Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.
As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the AI Silicon Engineering (AISiE) SoC Design Verification team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.
We are looking for a Senior Design Verification Engineer to join the team.
#SCHIE
Responsibilities
Buid, validate and automate emulation models with constant improvement in runtime efficiency. Preferred platforms include Zebu and Palladium.
Develop complex verification environments and test suites, including pre-silicon functional verification at the block, chip, and system levels, reference modeling, and post-silicon validation.
Collaborate with architects and design engineers to define verification plans, including strategy, test environments, and requirements for IP/Subsystem/SoC-level verification.
Create and drive comprehensive test plans and develop tests to ensure full feature coverage.
Design and implement technical solutions to address complex design and quality challenges.
Develop verification components such as scoreboards, sequences, constrained random tests, assertions, and functional coverage models.
Triage and debug failures in testbenches, simulations, and emulation environments.
Develop Makefiles and automation scripts to enable scalable and efficient verification flows.
Apply Agile methodologies, including participation in code reviews, sprint planning, and continuous integration practices.
Collaborate effectively with cross-functional teams across multiple sites and geographies
Qualifications
Required Qualifications:
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
Preferred Qualifications:
6+ years of experience in creating emulation and simulation environments, developing tests, and debugging for multiple silicon IP's or systems.
3+ years’ industry experience of chip and/or computer architecture.
3+ years industry experience in Verilog, C/C++, and scripting language such as Python, Ruby or Perl
CPU or Graphics core verification experience
Experience with hardware emulation or FPGAs.
In depth knowledge of verification principles, testbenches, stimulus generation, System Verilog, UVM, and coverage closure.
Experience with hardware design for embedded systems.
Firmware development, with secure and non-secure boot flow.
Design experience or ability to write synthesizable code.
Software development experience.
Communication skills.
Other Requirements:
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.
Skills Required
- Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with required years of experience per posting (Doctorate +1 year OR Master's +4 years OR Bachelor's +5 years) or equivalent experience.
- Ability to meet Microsoft Cloud Background Check and other required security screenings (periodic rechecks).
- Provide proof of citizenship or US residency or other protected status for assessment of eligibility to access export-controlled information.
- 6+ years experience creating emulation and simulation environments, developing tests, and debugging for multiple silicon IPs or systems.
- 3+ years industry experience in chip and/or computer architecture.
- 3+ years industry experience in Verilog, C/C++, and scripting languages such as Python, Ruby, or Perl.
- CPU or Graphics core verification experience.
- Experience with hardware emulation or FPGAs.
- In-depth knowledge of verification principles, testbenches, stimulus generation, SystemVerilog, UVM, and coverage closure.
- Experience with hardware design for embedded systems and ability to write synthesizable code.
- Firmware development experience, including secure and non-secure boot flow.
- Software development experience and strong communication skills.
Microsoft Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Microsoft and has not been reviewed or approved by Microsoft.
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Fair & Transparent Compensation — Pay is presented as broadly competitive overall, with clear role/level/location variation and an emphasis on using posted ranges and band information for apples-to-apples comparisons.
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Retirement Support — Retirement benefits are described as a standout, highlighted by a strong 401(k) match structure and immediate vesting, plus additional plan features for tax-advantaged saving.
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Parental & Family Support — Family-oriented benefits are portrayed as a meaningful strength, with substantial paid parental leave and added supports like back-up care and adoption/surrogacy assistance.
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