Overview:
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for engineers to help achieve that mission.
As Microsoft's cloud business continues to grow, the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the AISIE (AI Silicon Engineering) team focuses on custom IP and subsystem design and verification for Microsoft’s AI silicon. Its scope includes taking major silicon building blocks from development through production for the AI infrastructure roadmap.
We are hiring a Senior Design Verification Engineer
#SCHIE
Responsibilities
The Senior Verification Engineer should have the ability to work with cross-discipline teams (architecture, design, verification) to develop environment and test cases to verify designs.
Responsibilities include:
- Test Plan Creation and Review
- Testbench/Environment Creation
- Crafting of Test cases
- Functional Coverage Development and Closure
- Code Coverage Closure
Qualifications
Required Qualifications:
Other:
Ability to meet Microsoft, customer, and/or government security screening requirements is required for this role. These requirements include, but are not limited to, the following specialized security screening: Microsoft Cloud Background Check. This position is required to pass the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their U.S. permanent residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Preferred Qualifications:
- 6+ years of experience in developing test plans, creating simulation environments, developing tests, and debugging for multiple IPs, SoCs or systems
Substantial background in creating simulation environments, developing tests or debugging designs
Solid understanding of chip and/or computer architecture
Experience writing tests in UVM
Knowledge of AXI protocol \
Experience in debugging Subsystems/SOCs scenarios with embedded processors
Experience with secure hardware design for embedded systems
Experience with hardware emulation or FPGAs
Experience in RTL design for FPGA or emulation
Experience in Assembly, start up code and linker scripts
Experience in developing makefiles for software development
#SCHIE
Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.
Skills Required
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 1+ year of technical engineering experience
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 4+ years of technical engineering experience
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 5+ years of technical engineering experience
- Equivalent experience may substitute for the stated education and experience combinations
- Ability to pass Microsoft's Cloud Background Check upon hire or transfer and every two years thereafter
- Eligibility to access export-controlled information under applicable regulations, verified through citizenship, permanent residency, or other protected status documentation
- 6+ years developing test plans, simulation environments, tests, and debugging for multiple IPs, SoCs, or systems
- Substantial experience creating simulation environments, developing tests, or debugging designs
- Strong understanding of chip and/or computer architecture
- Experience writing tests in UVM
- Knowledge of the AXI protocol
- Experience debugging subsystem or SoC scenarios with embedded processors
- Experience with secure hardware design for embedded systems
- Experience with hardware emulation or FPGAs
- Experience with RTL design for FPGA or emulation
- Experience with Assembly, startup code, and linker scripts
- Experience developing Makefiles for software development
Microsoft Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Microsoft and has not been reviewed or approved by Microsoft.
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Fair & Transparent Compensation — Pay is presented as broadly competitive overall, with clear role/level/location variation and an emphasis on using posted ranges and band information for apples-to-apples comparisons.
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Retirement Support — Retirement benefits are described as a standout, highlighted by a strong 401(k) match structure and immediate vesting, plus additional plan features for tax-advantaged saving.
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Parental & Family Support — Family-oriented benefits are portrayed as a meaningful strength, with substantial paid parental leave and added supports like back-up care and adoption/surrogacy assistance.
Microsoft Insights
What We Do
At Microsoft, our mission is to empower every person and every organization on the planet to achieve more. Our mission is grounded in both the world in which we live and the future we strive to create. Today, we live in a mobile-first, cloud-first world, and the transformation we are driving across our businesses is designed to enable Microsoft and our customers to thrive in this world.
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