Jobs at TetraMem

The Digital Hardware Intern will assist in RTL design, perform functional verification, and support digital system integration and optimization.

The role involves developing mixed-signal verification plans, creating testbenches, writing test cases, collaborating with design teams, and optimizing verification methodologies for IC designs.

Support the design, verification, and integration of digital systems in AI accelerators through RTL design and simulations.

Assist in developing tools for neural networks on analog compute-in-memory chips. Responsibilities include coding, analysis, collaboration, and testing.

Design and develop high-performance analog integrated circuits, collaborate with teams, mentor junior engineers, and support testing and validation processes.

Assist with the design and validation of high-performance analog circuits, perform simulations, and support silicon validation and testing.

Assist with schematic design, simulation, layout, and transistor-level analysis of analog and mixed-signal CMOS circuits. Support silicon validation, test chip bring-up, performance measurements, and circuit improvement while collaborating with the analog team in lab and simulation environments.

Develop and optimize compiler, runtime, and SDK components for TetraMem's analog compute-in-memory AI hardware. Translate ML models into efficient executables, implement low-level optimizations and debugging tools, integrate ML frameworks and deployment pipelines, benchmark and profile workloads, support hardware bring-up and validation, and collaborate across teams to improve system performance.

Design, develop, and optimize embedded software for AI-driven applications. Lead technical efforts and mentor junior engineers, ensuring performance and reliability in real-time systems.

The Analog Layout Engineer will design and implement analog and mixed-signal layouts for integrated circuits, leading a team, ensuring quality, and adhering to design guidelines.

Develop and optimize Python and C++ software to compress, convert, deploy, and run neural networks on analog compute-in-memory hardware. Implement quantization, pruning, graph optimizations, runtime APIs, and profiling tools. Collaborate with researchers and hardware engineers, perform testing, debugging, and CI, and support research, documentation, and validation of hardware-software co-design for edge and embedded AI systems.

Develop and maintain in-house CAD tools and automation for analog/digital IC design and SoC sign-off. Optimize EDA license usage, research advanced CAD methodologies, mentor junior engineers, collaborate with design/verification/IT/EDA vendors, and participate in design reviews to improve processes.

Develop and release ATE test programs using Teradyne tools, support testing infrastructure, drive optimization for production, and collaborate with product teams.

Develop and optimize Python or C++ code to compress, convert, deploy, and run neural network models efficiently on analog compute-in-memory chips. Profile performance, support software design and runtime environments, collaborate with AI researchers and hardware engineers, and participate in code reviews, testing, and documentation.

The Head of Software will define TetraMem's software roadmap, oversee ML systems development, and lead compiler/toolchain and embedded software projects, while building and mentoring a technical team.

The Application Engineer provides technical support for AI products, collaborates with customers, and resolves issues while maintaining documentation and driving customer satisfaction.

Develop and validate software for a mixed-signal In-Memory Computing platform by executing tests, debugging issues, and improving testing processes.

The Analog Layout Engineer will design and implement analog and mixed-signal layouts, lead layout engineers, and ensure design quality meets guidelines.

The Device Testing Engineer conducts hands-on testing of devices, analyzes data, prepares reports, maintains equipment, and collaborates with development teams on improvements.

Develop and optimize a compiler toolchain for translating deep learning models, collaborating with ML and hardware teams. Requires significant industry experience in compiler development.