The role involves verifying digital design blocks, building verification environments using SystemVerilog and UVM, and collaborating with design engineers to ensure full functionality coverage.

Seeking a Senior Back End Engineer with over 10 years of experience in backend design, responsible for complex RTL2GDSII flows, low power design, and vendor collaboration.

The Mixed Signal Verification Engineer is responsible for behavioral modeling of analog designs, dynamic mixed-signal verification, and developing test cases using industry-standard tools.

Lead a team in mixed-signal verification, collaborating on specifications and verification plans, and managing project timelines to ensure successful delivery.

The RF System Engineer will manage RF systems from definition to operational integration, focusing on simulation, analysis, and development.

The Senior Layout Designer will develop high-end ADC/DAC for optical communication, requiring expertise in Cadence tools and TSMC technologies.

Lead and manage the DFT team, overseeing the DFT lifecycle for ASICs and SoCs, while ensuring DFT integration, test quality, and team growth.

Lead backend design from RTL to GDSII, manage a design team, and ensure successful delivery of production-ready designs and tape-outs.

The Senior Verification Engineer will lead RTL design verification activities, build verification environments using SystemVerilog and UVM, and work with design engineers for debugging and coverage collection.

The Analog Layout Designer will develop high-end ADC/DACs for optical communication, requiring expertise in layout tools and design technology.

Design and develop advanced analog circuits (including ADC/DAC) for optical communication, along with verification and system understanding.

Seeking an expert analog designer with over 10 years of experience in ADC/DAC design for optical communication, leading complex analog systems and teams.

The VLSI RTL Designer will create innovative communication systems, tackle architectural challenges, and detail implementation with strong Verilog/System-Verilog skills.

Design and develop innovative communication systems as a VLSI Design Engineer, focusing on architectural challenges and detailed implementation.