Jobs at Cadence Design Systems

The Engineer will collaborate with customers on Cadence component systems, provide technical support, and deliver product demonstrations and training.

The role involves supporting foundry PDK and design service teams to deliver accurate EM modeling solutions, ensuring consistency and qualification for advanced technology flows.

The Principal Analog IC Designer leads the design and development of analog/mixed signal IC circuit blocks, ensuring they meet customer specifications through strong analytical and design skills.

Provide technical support for Virtuoso analog backend flows, assist in PDK enablement, and help foundry teams with technology files and QA flow.

The Application Engineer Manager will enhance customer verification productivity by leveraging Formal Verification and Functional Simulation tools, lead technical strategies, mentor engineers, and ensure high-quality customer support.

The Foundry Virtuoso Engineer provides technical support for Virtuoso-based flows, assists with PDK enablement, collaborates with foundry teams on techfiles, and communicates customer issues to product engineers.

The Lead Product Engineer will develop and maintain digital implementation flows, support design service teams, and provide methodology guidance for production SoC designs.

The Corporate Counsel will advise on employment law matters, support M&A deals, and assist with litigation and compliance issues, while promoting efficiency within the legal team.

The role focuses on supporting Foundry PDK teams and Design Service teams by enabling EM/IR and thermal signoff technologies, including techfile development and reference flow creation through collaboration and validation of modeling assumptions.

The Pegasus Application Engineer supports customer integration and deployment of the Cadence Pegasus Verification System, focusing on physical verification and signoff processes.

The role involves coordinating university programs, managing documentation and workflows, engaging with academic entities, and supporting event logistics. Communication with stakeholders and reporting on activities are also key responsibilities.

The role involves supporting Foundry PDK and Design Service teams in deploying standard cell, IO, and memory libraries using Cadence Liberate. Responsibilities include developing techfiles, generating Liberty models, and ensuring alignment with signoff requirements for various design stages.

The Contract Technical Recruiter will manage full-cycle recruiting for technical roles, partnering with managers to attract and hire top candidates while ensuring compliance and a positive experience.

The Revenue Accounting Manager will oversee revenue recognition, prepare analytical reports, manage quarterly close activities, and collaborate with auditors, while adhering to ASC guidelines.

The Sr Principal Design Engineer will lead complex Silicon programs, define next generation Chiplets, integrate IP solutions, and guide technical teams. Responsibilities include quality assurance, planning activities, cross-functional meetings, and representing Cadence at conferences.

The Principal Program Manager coordinates R&D Development Projects and manages customer engagement, ensuring project success through collaboration and effective execution.

The Design Engineer II role focuses on post-silicon testing and validation of Analog and Digital IP solutions, requiring leadership in lab tests and silicon characterization while collaborating with remote teams.

Develop Formal Verification IPs, including Verilog design models and System Verilog Assertions for industry standard bus protocols, while collaborating across teams.

The role involves certifying the Cadence Innovus Platform, collaborating with RD and foundry partners, and supporting customers with technical challenges.

The Lead Product Engineer will certify the Cadence Innovus Platform, collaborate with RD and foundry partners, and resolve complex technical issues for customers.