Top Engineering Jobs

Senior technical advisor supporting SoC designs using Arm IP (CPU, GPU, NPU, CoreLink, CoreSight). Guide IP selection/configuration, system integration, power/performance/scalability discussions, resolve cross‑IP issues, and partner with Sales, Product Marketing, Support, and Engineering to drive design wins.

Design and validate custom memory circuits for Arm CPUs, GPUs, and SoCs using advanced semiconductor processes. Responsibilities include memory architecture, transistor-level circuit design, layout collaboration, performance-power-area optimization, design margining, physical verification, characterization, front-end verification, release procedures, and quality assurance. The role also involves improving design methodologies and using AI-assisted scripting to increase efficiency and quality.

Develop testbenches and test suites, write and execute test plans, perform functional verification to quality and schedule targets, collaborate with design on microarchitectural review and debugging, develop reconfigurable IP features, and act as a solutions advocate across teams.

Lead GPU architecture research and prototyping, collaborate with engineers to develop and validate architectural improvements, perform workload performance analysis (gaming and GPGPU), engage with product teams, and deliver world-class GPU IP through hands-on prototyping and experimental investigations.

Lead cross-functional product engineering for SoC/CPU/GPU manufacturability from pre-silicon readiness through post-silicon bring-up. Own manufacturing flow, ATE/SLT test and correlation, yield improvement, silicon/package reliability qualification, PVTF characterization, and failure analysis while coordinating with foundries, OSATs, design, validation, test, and quality. Support NPI/HVM readiness and audits, with international travel up to 20%.

Lead subsystem-level verification of PCIe and CXL IOs: define verification strategy, craft test plans, develop SystemVerilog/Verilog/UVM testbenches, run simulation/emulation, debug issues, improve methodologies, and mentor junior engineers while coordinating with architects and project managers.

Support deployment, training, and support of internal SoC design and verification flows. Work with project engineers and methodology developers to ensure front-end and back-end flows function correctly, ramp teams, liaise with EDA vendors to resolve tooling issues, and identify efficiency improvements across engineering projects.

Lead system-level definition and partner engagements to drive Arm AGI CPU adoption in cloud and data-center markets. Define rack-scale hardware solutions, collaborate with SoC, platform, software, and verification teams, support product requirements, perform competitive analysis, and represent Arm at industry forums to enable scalable, power-efficient server and accelerator deployments.

Lead microarchitecture, RTL development, and integration of high-speed interconnect subsystems (PCIe, CXL, UALink). Translate requirements into synthesizable RTL, collaborate across architecture, verification, firmware, and physical design, analyze traffic and buffering tradeoffs, drive delivery from concept through synthesis and timing closure, mentor engineers, and debug cross-functional issues to meet performance, power, area, and reliability targets.

Lead architecture, design, and delivery of coherent and non-coherent SoC interconnect fabrics. Define system-level interconnect strategies (topology, QoS, latency, bandwidth, power), collaborate across CPU/GPU/NPU/memory teams, drive standards adoption, own performance modeling and RTL/verification strategy, lead debug/root-cause analysis, mentor engineers, and shape roadmaps for next-generation interconnect IP to support tape-out and silicon validation.