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In-Office
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Senior level
Senior level
Hardware • Internet of Things • Software • Wearables • Semiconductor
Lead the development and testing of Ambiq's Zephyr software, including driver and software testcase development, maintaining compliance, and solving issues in collaboration with global teams.
Top Skills: ArmAssemblyCConfluenceGitI2CJIRAPythonSpiUartUsbZephyr Rtos
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In-Office
Austin, TX, USA
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Expert/Leader
Expert/Leader
Hardware • Internet of Things • Software • Wearables • Semiconductor
The Sr Director of System Architecture leads the development of ultra-low-power, AI-based SoC architectures and coordinates teams to drive specifications, power/performance analysis, and integration into products.
Top Skills: BluetoothEmbedded SystemsGpsLow-Power ArchitecturesMicrocontrollersMicroprocessorsNfcPower ManagementSystem On Chip (Soc)Wifi
Reposted 2 Months AgoSaved
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In-Office
Hsinchu City, TWN
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Senior level
Senior level
Hardware • Internet of Things • Software • Wearables • Semiconductor
Maintain and improve production test lines: troubleshoot and transfer tester platforms (D10/DX to S100), manage production tooling vendors, support OSAT yield improvement with foundry PE/TE, analyze RMA and production data, and coordinate shipping targets with planning and quality teams.
Top Skills: AteDiamond 10Diamond XDigital MultimeterJumpOscilloscopeS100Spectrum Analyzer
Reposted 2 Months AgoSaved
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In-Office
Austin, TX, USA
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Expert/Leader
Expert/Leader
Hardware • Internet of Things • Software • Wearables • Semiconductor
The Principal Engineer - RTL will oversee pre-tape out quality for digital SoC modules, lead architecture and micro-architecture development, and manage RTL development. Responsibilities include IP integration, collaboration with verification teams, and assisting in silicon validation.
Top Skills: Verilog
Reposted 2 Months AgoSaved
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In-Office
Singapore, SGP
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Expert/Leader
Expert/Leader
Hardware • Internet of Things • Software • Wearables • Semiconductor
Design and implement low-power DFT architecture for ultra-low-power SoCs: scan insertion, boundary scan, MBIST and ATPG; generate and optimize structural test vectors; run pre/post-layout simulations; collaborate with designers and test engineers to resolve timing, power, and logical issues and bring up tests on silicon.
Top Skills: At-SpeedAtpgBoundary ScanDftGlsMbistPath-DelayPre/Post-Layout SimulationRtlScan CompressionScan InsertionStaStandard Eda ToolsStuck-AtTcl
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Reposted 2 Months AgoSaved
Easy Apply
In-Office
Singapore, SGP
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Senior level
Senior level
Hardware • Internet of Things • Software • Wearables • Semiconductor
Develop, implement, and debug FPGA images for pre-silicon prototyping using Xilinx and Intel toolchains. Collaborate with SoC design, software, verification, and test teams to define timing constraints, support regression test suites, reproduce and triage issues pre- and post-silicon, and perform lab bring-up and instrument-based debugging.
Top Skills: Amd Vu19PArm Mps4BitstreamCCadence Soc Design FlowGitI2CI3CIntel Quartus Prime ProLogic AnalyzerMspiProtocol AnalyzerPythonRtlSiemens ProfpgaStatic Timing AnalysisStratix-10SystemverilogUartUsbVerilogVpsXilinx IseXilinx VivadoYaml
Reposted 2 Months AgoSaved
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In-Office
Hsinchu City, TWN
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Expert/Leader
Expert/Leader
Hardware • Internet of Things • Software • Wearables • Semiconductor
The Staff Engineer - DFT will implement DFT strategies for low-power SoCs, develop test architectures, and collaborate with teams for test vector integration and analysis.
Top Skills: DftEda ToolsGlsRtlTcl
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In-Office
Singapore, SGP
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Senior level
Senior level
Hardware • Internet of Things • Software • Wearables • Semiconductor
Design and optimize ultra-low-power embedded SRAM and register file IPs, develop/enhance SRAM compilers, implement memory peripheral circuits, perform timing/power/low-voltage characterization, correlate silicon measurements, drive yield improvements, build automation scripts, and support IP integration through production.
Top Skills: 12Nm FinfetCadence Liberate MxCadence VirtuosoEccEmbedded SramHspiceLiberty (.Lib)MbistMonte Carlo SimulationsPerlPythonRegister FileSpectreSpice SimulatorsSram Compiler DevelopmentTcl
Reposted 2 Months AgoSaved
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In-Office
Austin, TX, USA
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Senior level
Senior level
Hardware • Internet of Things • Software • Wearables • Semiconductor
Lead end-to-end digital verification for complex SoCs, developing UVM/SystemVerilog testbenches, SoC-level C/C++ tests, automation, coverage goals, debugging, and collaborate with design teams to ensure production-ready silicon.
Top Skills: Amba AhbAmba ApbAmba AxiArmCC++DmaMakefilePerlPythonRisc-VSocSystemverilogUvmVerilogVip
Reposted 2 Months AgoSaved
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In-Office
Austin, TX, USA
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Senior level
Senior level
Hardware • Internet of Things • Software • Wearables • Semiconductor
Lead development, testing, and maintenance of Ambiq's Zephyr software offering: port SoCs, enable hardware platforms, build drivers and samples, manage CI/CD and issue resolution, optimize for ultra-low power, create application notes, and support field/customers.
Top Skills: Arm Cortex-MAssemblyCCi/CdConfluenceEclipseGitI2CIarJIRAKeilLogic AnalyzerOscilloscopeOzonePythonScripting LanguagesSpiTest AutomationUartUsbZephyr Rtos
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