Top Engineering Jobs

Support DRAM design verification by developing test cases, test benches, test vectors, and verification environments. Simulate, analyze, and debug pre-silicon block-level and full-chip designs; run regressions and improve functional coverage. Use AI-based tools, agentic workflows, and automation to accelerate verification and debugging. Collaborate internationally on verification methodologies for DRAM and emerging memory products.

Lead global contamination-control strategy across semiconductor wafer fabs, improving yield, reliability, throughput, and cost. Responsibilities include contamination-risk mitigation, process and equipment optimization, capacity expansion support, wafer-shipment controls, KPI development, supplier collaboration, SOP standardization, and cross-functional project leadership. The role requires driving data-based monitoring, resolving process issues, supporting qualifications, coordinating global teams, and communicating outcomes across manufacturing sites.

Drive next-generation memory package architecture and pathfinding across silicon, packaging, boards, and systems. Define packaging strategies optimized for bandwidth, power, thermal, mechanical, electrical, and system performance. Lead cross-functional collaboration with design teams, customers, business units, and senior leaders. Develop AI-based EDA and automation tools, measurement automation, and long-term technology roadmaps. Apply expertise in memory systems, package design, signaling, power integrity, timing, and simulation.

Own verification and end-to-end analysis of full-chip gate-level DRAM designs. Develop SystemVerilog/UVM testbenches, test cases, stimuli, test vectors, regressions, and coverage improvements. Simulate and debug block-level and full-chip designs, support AMS co-simulation, develop verification methodologies, and improve workflows using AI tools and automation. Guide new team members and collaborate with global design and verification teams across advanced memory products.

Leads validation strategy and automated testing for NAND-based SSD firmware across functional, performance, reliability, interoperability, and customer qualification domains. Develops test plans and automation frameworks, debugs NVMe and SAS issues, analyzes quality risks, and drives issue closure with cross-functional engineering teams and hyperscale customers. Applies AI and machine learning to test generation, failure analysis, anomaly detection, reporting, and predictive quality. Mentors engineers and leads complex validation programs.

Drives local and global projects involving MES applications, optimizing system setups and semiconductor fab process controls. Owns application training, issue resolution, software updates, and system improvements. Coordinates business processes and QMS components while maintaining compliance and customer requirements during planned changes. Collaborates across teams, analyzes data, leads meetings, and explores AI-agent workflows using tools such as Copilot and Claude.

The Staff Engineer will design, simulate, optimize, and verify NAND Flash circuits while collaborating on architecture evaluation and analysis for performance and reliability.

Design and optimize analog and mixed-signal circuits for next-generation 3D-stacked HBM products. Responsibilities include power delivery architecture, on- and off-chip interface analysis, timing, area, power and complexity tradeoffs, thermal management, transistor-level simulation, future-generation memory pathfinding, and architecture documentation. The role collaborates with architecture and design teams to define circuit implementations, technology requirements, and specifications for high-performance, low-power memory systems.

Supports semiconductor assembly process startup, development, optimization, and continuous improvement. Diagnoses process issues, conducts failure analysis and statistical evaluations, validates process and equipment changes, improves yield and productivity, supports product qualifications and new product introductions, and uses AI-enabled analytics and manufacturing data for monitoring, root cause analysis, and operational decision-making.

Develops and optimizes semiconductor unit-process technologies for advanced DRAM and HBM products. Responsibilities include process recipe development, technology roadmaps, supplier strategy, structural/material/electrical data analysis, and innovations improving performance, yield, reliability, and cost. The role collaborates with integration, device, design, equipment, and material partners; recommends technology strategy to leadership; uses AI to improve development efficiency; and mentors engineers.