Are you passionate about how ASIC @ Nvidia is validated ? Have you wondered how we create close to real workloads to make sure chips @ NVIDIA remain reliable. Emulation and Prototyping plays an important role in achieving this. Are you interested in pushing the boundaries of innovation to make emulation & FPGA platforms faster, more scalable, and more efficient? Can you work in a fast-paced environment that requires coordination between many teams across geographies and solving sophisticated problems daily? If so, we are looking for hardworking systems engineers who will craft DV/Verification knowledge and extend to emulation & FPGA environments for our next generation GPUs, SOCs, NICs, and Switches on industry-standard FPGA prototyping and emulation platforms.
We are now looking for a Verification Engineer, Emulation & Prototyping to join our team onsite in Santa Clara, CA.
What you’ll be doing:
Build emulation and FPGA environments by making RTL FPGA/emulation-friendly, partitioning the design, and taking it through synthesis, place-and-route, and emulator compilation flows.
Improve performance of emulation and FPGA platforms, analyze timing/performance bottlenecks, and generate bitstreams/images.
Bring new DV Test benches that can provide high-level abstraction of C/SV TB, running at FPGA speeds.
Bring up designs on hardware emulation & FPGA platforms and drive complex debug and problem-solving activities.
Scale emulation/FPGA verification methodology in order to cater extensive test-plans
Work closely with architects, designers, verification engineers, validation teams, and software teams to accomplish project goals.
Enable pre-silicon software development, validation, and performance analysis using hardware emulation & FPGA environments.
Develop and optimize emulation-friendly validation infrastructures, including high-performance software interfaces and scalable debug methodologies.
What we need to see:
BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or related fields with 5+ years of experience, or MS with 3+ years of proven experience in FPGA prototyping and/or hardware emulation.
Strong understanding of FPGA prototyping and hardware emulation architectures, devices, flows, and tools.
Hands-on experience with Simulators or Emulators across vendors
Hands-on experience with emulation platforms such as Synopsys ZeBu, Siemens Veloce Synopsys or Cadence Z3. Familiarity with ProtoCompiler or Synplify Premier, Xilinx Vivado,
Extensive knowledge of writing SV/Verilog code for TB-Emulator , high speed integrations
Understanding of industry-standard protocols such as PCIe, CXL, NVLINK, USB, CHI, and CPU-GPU coherency.
Candidates must have strong expertise in crafting and optimizing emulation-friendly C/C++ testbenches and transactors. These must function efficiently at emulation speeds. Experience minimizing host-emulator communication bottlenecks and improving transaction efficiency is necessary. Additionally, crafting scalable validation environments based on software for high-performance SoCs and multi-ASIC systems is required.
Ability to develop efficient DPI/PLI/SystemC-based interfaces and software infrastructures that enable high-speed validation, debug, and bring-up on hardware emulation platforms.
Ways to stand out from the crowd:
Ability to actively code in C/C++ , Python and perl
Use agentic, Claude to improve coding or drafting solutions for a problem
Prior experience with hardware emulation or prototyping platforms (Synopsys HAPS, ZeBu, Siemens Veloce) of a high-performance processor or SOC is highly desirable.
Understanding of performance-sensitive validation methodologies for large-scale emulation environments, including efficient logging, synchronization, memory handling, and protocol traffic generation and experience enabling pre-silicon software validation, firmware bring-up, or system-level debug on emulation platforms is a plus!
Understanding of Cadence/Synopsys/Siemens transactor solutions.
You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.Skills Required
- BS in Electrical Engineering, Computer Engineering, or related field with 5+ years experience, or MS with 3+ years in FPGA prototyping/hardware emulation
- Strong understanding of FPGA prototyping and hardware emulation architectures, devices, flows, and tools
- Hands-on experience with simulators or emulators across vendors
- Hands-on experience with emulation platforms such as Synopsys ZeBu, Siemens Veloce, Cadence Z3
- Familiarity with ProtoCompiler or Synplify Premier and Xilinx Vivado
- Extensive experience writing SystemVerilog/Verilog for testbenches targeting emulators and FPGA integrations
- Understanding of protocols such as PCIe, CXL, NVLINK, USB, CHI, and CPU-GPU coherency
- Expertise in crafting and optimizing emulation-friendly C/C++ testbenches, transactors, and minimizing host-emulator communication bottlenecks
- Ability to develop efficient DPI/PLI/SystemC-based interfaces and software infrastructures for hardware emulation platforms
- Ability to actively code in C/C++, Python, and Perl
- Prior experience with hardware emulation/prototyping platforms (e.g., Synopsys HAPS, ZeBu, Siemens Veloce) for high-performance processors or SoCs
- Understanding of Cadence/Synopsys/Siemens transactor solutions
NVIDIA Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about NVIDIA and has not been reviewed or approved by NVIDIA.
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Equity Value & Accessibility — Equity awards and a discounted ESPP are highlighted as core parts of total compensation, enabling employees to share in the company’s success. Stock-based compensation and the two-year lookback ESPP are consistently described as especially valuable.
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Healthcare Strength — Health coverage is portrayed as robust, with comprehensive medical, dental, and vision options alongside mental health support and on-site care resources. Employer HSA contributions and wellness perks reinforce the depth of the offering.
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Retirement Support — Retirement programs are depicted as strong, featuring a meaningful 401(k) match with Roth options and support for Mega Backdoor Roth contributions. These elements position long-term savings as a notable advantage of the total rewards package.
NVIDIA Insights
What We Do
NVIDIA’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing — with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. Today, NVIDIA is increasingly known as “the AI computing company.”
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