Jobs at NVIDIA

Lead end-to-end materials planning and procurement readiness for NPI to mass production. Identify and mitigate supply constraints and single-source risks, run cross-functional readiness reviews, drive demand analysis, and deploy BI/AI solutions to improve supply-demand alignment and predictive decision-making.

Design and develop infrastructure libraries for ATE systems, enhance test program architecture, and collaborate cross-functionally to improve product quality and time-to-market.

Design and develop RDMA protocols for AI networking, collaborate with teams to innovate solutions, and build proofs-of-concept.

Develop algorithms and optimizations for inference and compiler stack, enhance performance metrics, collaborate with hardware teams, and publish work on novel approaches.

Develop and implement compiler optimization algorithms for deep learning workloads, analyze networks, debug and profile GPU performance (CUDA), define public APIs, and deliver ahead-of-time and just-in-time compilation techniques for NVIDIA GPUs to improve inference performance, build times, and memory efficiency.

Lead manufacturability and production readiness for thermal and mechanical components from NPI to mass production. Coordinate DFM, supplier qualification, tooling, processes, fixtures, testing, and automation. Identify and mitigate manufacturing risks, drive yield and quality improvements, and collaborate with R&D, operations, suppliers, and quality to ensure supplier readiness and scalable, cost-effective production.

Build an autonomous agentic platform to optimize AI models end-to-end (architecture, hyperparameters, GPU code). Develop agentic workflows, benchmarking for accuracy/latency/memory/throughput/cost, ensure reproducibility and safety, and lead technical initiatives while mentoring engineers across research, engineering, and product teams.

Lead modelling, analysis, and validation of GPU/SoC graphics and LPU features. Drive cmodel execution, infrastructure initiatives, tooling, test plans, coverage analysis, and cross-team collaboration to verify new architectures and features.

Verify high-performance, low-power security engines and RISC-V processor modules. Participate in micro-architecture development, author specifications, build SystemVerilog UVM verification environments, create verification and test plans to reach full coverage, debug RTL with designers, and deliver IP to cluster/FC verification and emulation.

Provide technical support to NVIDIA Enterprise customers by triaging and resolving issues, working with engineering on reproductions/logs, applying AI/ML and agentic AI to build support tools and products, documenting interactions and knowledge, and owning cases to resolution (occasional weekend/holiday support).

Design, build, extend, test, deploy, and maintain a centralized CI/CD infrastructure for open-source accelerated computing projects. Collaborate across teams, define CI/CD best practices, debug production issues, support other teams, and mentor junior engineers while setting technical direction and standards.

Design and implement RTL and system-level SoC modules, perform logic synthesis and timing analysis, integrate modules into SOC, collaborate with architects and verification teams, support silicon bring-up, and improve design flows and methodologies to enhance efficiency and chip yield.

The role involves deploying AI networking solutions in data centers, driving architectural decisions, troubleshooting network issues, and collaborating on customer projects for NVIDIA's technology solutions.

Design, build, extend, test, deploy, and maintain a centralized CI/CD infrastructure for open-source accelerated computing projects. Collaborate with teams, support platform users, ensure reliability/security/compliance, and debug production issues across the stack.

Design and deploy rack-scale AI infrastructure and cluster solutions for NVIDIA products. Collaborate with product teams and cross-functional engineering groups to onboard hardware/software stacks, optimize cluster deployments, and support multi-site datacenter and lab rollouts. Troubleshoot complex system failures, automate provisioning, and improve time-to-market for next-generation GPU/Tegra-based products.

Verify DFT designs and implementations by defining verification scope, building testbenches/BFMs/checkers/monitors, executing test and coverage plans, debugging, and collaborating with architects, designers, emulation, production test, and silicon verification teams.

Lead end-to-end mechanical design for GPU/LPU server and datacenter platforms, focusing on chassis, cooling, structural integrity, and system integration. Drive DFM with suppliers, build and test prototypes, validate designs, perform root-cause analysis, and collaborate with electrical and thermal teams to meet performance, reliability, and production goals.

Design and research RDMA load balancing and congestion-control algorithms for data-center networking. Build and validate algorithms in simulation and on real hardware, collaborate across teams to develop proofs-of-concept, and advance next-generation ConnectX/SPC-X networking solutions.

Design and execute test plans, automate tests, build and enhance test frameworks, integrate automation into CI/CD, validate UIs and REST APIs, perform root-cause analysis, and leverage LLMs and AI tools to improve QA workflows and productivity.

Operate and improve the reliability, availability, and performance of large-scale GeForce NOW services. Participate in incident triage and on-call rotations, build automation and tooling, enhance observability (metrics/logs/traces), drive SLO/SRI practices, run postmortems, and design/operate Kubernetes-based services across cloud and datacenter environments.