Sr. Principal Product Engineer, RTL-GDSII

Reposted Yesterday
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Austin, TX, USA
In-Office
Expert/Leader
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
The role involves collaborating with R&D and Application Engineering teams to enhance chip design tools, focusing on PPA benchmarking and optimization.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

This position presents an exciting opportunity within Cadence’s Digital and Signoff Group (DSG) for a Product Engineer. In this dynamic environment, you’ll collaborate closely with R&D, Application Engineering & product marketing teams to help drive the development of advanced chip design software tools. Your responsibilities will include:

  • Provide place-and-route expertise to both Cadence customers and internal development teams
  • PPA benchmarking on customer and foundry test cases
  • Evaluate impact of new features on PPA
  • Be a liaison for new features between customer/foundry and R&D development teams
  • Develop point solutions with scripting
  • Data mining and analysis to uncover PPA limiting issues and identify optimization opportunities

Minimum Qualifications:

  • A Bachelor or Master’s degree in EE/CS or equivalent major (Masters level preferred)
  • A minimum of 10 years of hands on experience with any industry standard place-and-route tools (7 years with Master Degree)
  • A good understanding of the RTL-GDSII flow
  • A good understanding of the PDK and DK collaterals
  • Firm understanding of Timing and power analysis
  • Good scripting skills
  • Must be legally eligible to work in the US
We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • Bachelor or Master's degree in EE/CS or equivalent major
  • Minimum 10 years of hands-on experience with industry standard place-and-route tools
  • Understanding of RTL-GDSII flow
  • Understanding of PDK and DK collaterals
  • Firm understanding of Timing and power analysis
  • Good scripting skills

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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