This is a full-time on-site role for a Sr Principal Physical Design Engineer based in Bengaluru. The engineer will be responsible for overseeing and contributing to the physical design process of complex IPs, especially Memory IPs with higher frequencies on latest Tech. nodes. Day-to-day tasks include floorplanning, placement, clock tree synthesis, routing, and physical verification. The role also involves collaborating with cross-functional teams, mentoring junior engineers, and ensuring design meets performance, power, and area specifications.
Qualifications
- Strong expertise in floorplanning, placement, clock tree synthesis, routing, and physical verification
- Experience with physical design tools like Cadence Innovus, Synopsys ICC2, or similar
- Proficient in scripting languages such as TCL, Perl, and Python for design automation
- Knowledge of timing analysis, signal integrity, and power analysis
- Excellent problem-solving skills and attention to detail
- Strong communication and collaborative skills
- Bachelor’s or Master’s degree in Electrical Engineering or related field
- 11-15 years of relevant experience in physical design
- Experience in leading and mentoring a team
Top Skills
What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.
