Broadcom

Sr. Memory Layout Design Engineer

Posted Yesterday

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Hiring Remotely in Electronics City, Bangalore, Karnataka, IND

Remote

Senior level

Software • Semiconductor • Manufacturing

The Role

Lead memory layout design for advanced submicron processes using Cadence and Calibre tools. Own floor-planning, hierarchy layout, verification (LVS/DRC/ERC), scheduling, team leadership, and integration. Document methodologies and adapt flows for new process nodes while training junior engineers and ensuring on-time, high-quality deliverables.

Summary Generated by Built In

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Job Description:

Job Requirements:

- Bachelor's degree with 12 years of experience or a Master's degree with over 10 years of experience.

- Proficiency in using Cadence tools (Virtuoso Layout, Layout XL, Cadence Schematic Capture, and verification tools - Calibre & Hercules).

- Strong layout knowledge in submicron processes (e.g., 7nm, 5nm, 3nm, 2nm).

Key Responsibilities:

- Understand and apply layout guidelines, new process rules, and technical requirements for high-quality layouts.

- Manage scheduling, timelines, and layout floor-planning.

- Ensure end-to-end deliverables are completed with high quality and within the planned schedule.

- Adapt quickly to new methodologies and communicate effectively with the SOC and library teams.

Skill Set(Memory):

- Strong experience in memory layout design and physical verification (LVS, DRC, ERC, Antenna, Electro Migration).

- Experience with Cadence Layout tools (Virtuoso XL, VXL, or EXL) and Calibre verification tools.

- Proficiency in floor-planning, hierarchy layout, and chip integration.

- Solid understanding of memory architecture and RC requirements, with the ability to plan signal and power routing.

- Ability to lead teams, train junior engineers, and manage projects effectively.

- Strong knowledge of memory layout topology; experience with memory compilers is preferred.

- Knowledge of AI, layout automation, and script/SKILL programming is preferred.

- Ability to lead new technology reviews to document layout methodologies, flows, and guidelines.

- Self-reliant with the ability to work both independently and collaboratively.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

Bachelor's degree with 12 years experience or Master's degree with over 10 years experience
Proficiency with Cadence tools (Virtuoso Layout, Layout XL, Cadence Schematic Capture)
Experience with verification tools Calibre and Hercules and physical verification (LVS, DRC, ERC, Antenna, Electromigration)
Strong layout knowledge in submicron processes (7nm, 5nm, 3nm, 2nm)
Strong experience in memory layout design, floor-planning, hierarchy layout, and chip integration
Solid understanding of memory architecture and RC requirements; ability to plan signal and power routing
Ability to lead teams, train junior engineers, manage projects, and handle scheduling/timelines
Ability to lead new technology reviews and document layout methodologies, flows, and guidelines
Self-reliant with ability to work independently and collaboratively
Experience with memory layout topology and memory compilers
Knowledge of AI, layout automation, and script/SKILL programming

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

Equity Value & Accessibility — Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
Retirement Support — A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
Pay Growth & Progression — Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.