Develop scalable Kubernetes-based systems, create custom operators, optimize clusters, integrate CI/CD, and troubleshoot Kubernetes applications. Collaborate cross-functionally and contribute to open-source projects.

Manage and optimize the Mainframe Technical Consulting team’s performance, ensuring effective resource allocation while supporting sales and enhancing customer experiences through the adoption of Broadcom Mainframe products.

Lead AI/ML innovation in VCF Operations, architecting scalable systems and collaborating with teams to enhance cloud management with intelligent automation.

Design, implement, and maintain software for VCF Operations Core Platform. Enhance automation with AI/ML, ensure reliable code, and support team collaboration.

Develop scalable Kubernetes features, maintain operators, optimize clusters, integrate CI/CD, enhance monitoring and troubleshooting, and collaborate on deployments.

The Account Director role focuses on enhancing customer relationships, driving sales results, and managing accounts effectively while ensuring customer satisfaction and adoption of solutions.

The Account Director is responsible for optimizing customer experience, managing accounts, and driving sales growth through collaboration and effective relationship management.

The Staff DFT Engineer will specialize in design for testability, utilizing tools and methodologies for silicon verification, validation, and test. They will work on post-silicon debug, and collaborate cross-functionally while leveraging their automation and scripting expertise.

The DFT Engineer will contribute to integrated connectivity products focusing on ASIC DFT development for data center networking, involving scan insertion, diagnostics, and architecture design.

This senior engineering role involves redefining the management of ESXi hypervisors in clustered operations, contributing to design, implementation, and addressing complex system challenges.

As a Principal Hardware Engineer, you will design and deliver electronic products, lead technical teams, and oversee comprehensive EE hardware design.

Lead DFT verification for HBM, DDR, and SERDES designs, collaborating across teams to ensure quality through robust methodologies and analysis.

Lead the DFT verification process for HBM, DDR, and SerDes designs, implementing methodologies, analyzing data, and ensuring design reliability through collaborative efforts with various teams.

The Reliability Engineer will plan, execute, and complete product qualifications, ensuring reliability assessment and communication skills are upheld while managing workload independently and in teams.

Design and implement physical layouts for power grids and interconnects, automate processes, and analyze high-speed signal interconnects for advanced IC technologies.

Responsible for developing next generation ASIC products focusing on signal integrity and power integrity in multi-chip modules and advanced interconnect technologies.

The Physical Design Engineer will develop layouts for 2.5D and 3D ICs, conduct electrical analyses, and automate design processes in a collaborative environment.

Develop and implement physical layouts for 2.5D and 3D IC products, including design automation, electrical analysis, and technology roadmapping.

Develop next generation products focusing on parallel interfaces. Responsibilities include timing signoff, modeling, PCB analysis, and automating sign-off processes.

Join Broadcom's Design Implementation team to work on CMOS ASICs for AI/ML, focusing on physical design tasks, customer communication, and addressing design challenges.