Senior ASIC Design Engineer - DFT

Reposted 4 Days Ago
Be an Early Applicant
Santa Clara, CA, USA
Hybrid
168K-311K Annually
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
The Role
Lead DFT methodology and IP design for SoC products, owning fuse controller architecture, RTL development, verification, and full-chip test plans. Collaborate with cross-functional teams for integration, support post-silicon bring-up and ATE validation, debug failures, and mentor junior engineers.
Summary Generated by Built In

We are now looking for a Senior ASIC Design Engineer to join our DFT team!

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. Make the choice to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips.
 

What you'll be doing:

As a key member of our DFX Methodology Team, you will play a critical role in shaping the architecture, design, implementation, and verification of DFT IPs for our next-generation SoC products. You’ll help drive innovation across the full silicon lifecycle—from pre-silicon to post-silicon—while mentoring and collaborating with cross-functional teams.

  • Own the architecture and design of fuse controller and other DFT IPs for cutting-edge SoC designs

  • Develop, deploy, and enhance DFT methodologies for scalability and future product needs

  • Define and align feature sets by working closely with architects, platform, and software teams

  • Partner with design, verification, synthesis, timing, and backend teams to ensure cohesive integration

  • Create and execute test plans to support both functional and DFT full-chip verification

  • Support post-silicon bring-up and validation efforts including debug and issue resolution

  • Mentor junior engineers on test design strategies and trade-offs related to cost, quality, and performance

What we need to see:

  • BS/MS Electrical or Computer Engineering (or equivalent experience) in related domain with proven DFT experience

  • 8+ years of hands-on experience in SoC architecture, RTL design, and verification

  • Strong proficiency in micro-architecture and RTL development using Verilog. (UVM experience is a plus)

  • Experience in DFT design, methodology, and implementation

  • Familiarity with related domains such as clocking, STA, place & route, and power optimization

  • Experience in post-silicon bring-up on ATE, including understanding of pattern formats, test program development, and failure analysis

  • Proficiency in scripting languages such as Python, Perl, or Tcl

  • Excellent communication skills and a collaborative mindset—with a curiosity and passion for solving complex technical challenges

Ways to Stand out from the Crowd:

  • Experience with UVM-based verification environments

  • Experience designing fuse, eFuse, or on-chip security blocks

  • Proven track record of successfully architecting DFT IPs across multiple product generations

Why Join Us? This is an opportunity to apply your DFT and SoC architecture expertise to some of the industry’s most complex and impactful semiconductor designs. At NVIDIA, your ideas will help shape energy-efficient compute platforms used by scientists, engineers, creators, and gamers around the world. You’ll grow alongside world-class engineering teams in a collaborative, fast-paced environment that values innovation, excellence, determination, and teamwork. We offer competitive compensation, comprehensive benefits, and meaningful opportunities to advance your career.

#LI-Hybrid

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:
168,000 USD – 264,500 USD for Level 4; and 196,000 USD – 310,500 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 3, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Skills Required

  • Bachelor's degree with 8+ years experience, or Master's degree with 6+ years experience
  • 5+ years hands-on experience in SoC architecture, RTL design, and verification
  • Proficiency in micro-architecture and RTL development using Verilog
  • UVM experience
  • Deep expertise in DFT design, methodology, and implementation
  • Familiarity with clocking, STA, place & route, and power optimization
  • Experience in post-silicon bring-up on ATE, including pattern formats, test program development, and failure analysis
  • Proficiency in scripting languages such as Python, Perl, or Tcl
  • Excellent communication skills and collaborative mindset

NVIDIA Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about NVIDIA and has not been reviewed or approved by NVIDIA.

  • Equity Value & Accessibility — Company stock and RSUs have driven exceptional total compensation, with a generous employee stock purchase plan and ongoing equity refreshers playing a central role. Feedback suggests historic share-price gains created significant financial upside for many.
  • Healthcare Strength — Multiple plan options (HSA, PPO, and in some locations Kaiser) with in-network preventive care covered at 100% and company HSA contributions indicate a robust offering. Mental-health sessions and broad dental, vision, and disability coverage further strengthen the package.
  • Parental & Family Support — Up to 22 weeks of fully paid parental leave, adoption and surrogacy reimbursement, and coverage for IVF and egg freezing are highlighted as standout features. Additional family-care resources and caregiving support broaden the appeal.

NVIDIA Insights

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The Company
HQ: Santa Clara, CA
21,960 Employees
Year Founded: 1993

What We Do

NVIDIA’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing — with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. Today, NVIDIA is increasingly known as “the AI computing company.”

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