Product Development Engineer

Posted 8 Days Ago
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Hsinchu County, TWN
In-Office
Junior
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
The Role
Design and implement manufacturing test processes for high-performance CPUs and automotive SoCs. Improve yields, test coverage, and capacity; drive Vmin/Fmax optimization and resolve ATE failures. Lead NPI bring-up, characterization, HTOL qualification (AEC-Q100), and ensure automotive zero-defect screening while correlating field failures with production data to root-cause and reduce cost.
Summary Generated by Built In

We are looking for a creative and independent Product Engineer in Hsinchu, Taiwan. We need a creative individual who will help transfer high-performance CPU and Automotive SoC products from design engineering to mass production. You will be exposed to various aspects of building and testing NVIDIA products, from advanced multi-core CPUs to safety-critical automotive processors. In addition, your responsibilities will be to increase yields, test coverage and capacity, and reduce production costs while ensuring the stringent quality and reliability requirements of the automotive market. If you are passionate about building the highest quality CPU and automotive products that will change the world, then we really want to hear from you.

 

What you'll be doing:

  • As part of Operations Engineering team that plays a key role in developing new CPU and Automotive SoC products, you will architect, design, and implement efficient manufacturing test processes for our state of the art processors.

  • Identify and implement test processes to improve manufacturing efficiency and test coverage for our latest CPU architectures and Automotive chips, built in leading-edge process technology.

  • Analyze product yield limiters, drive Vmin/Fmax optimization (speed binning), and drive resolution of failures on Automatic Test Equipment (ATE) while leading multi-functional efforts with design, foundry, quality, test to root-cause problems and implement improvements.

  • Define product test requirements and drive NPI bring up, validation, characterization, and reliability qualification (e.g., AEC-Q100) for smooth production ramp at worldwide manufacturing sites.

  • Influence and optimize the accurate placement of test coverage across our test and supply chain to achieve automotive "Zero-Defect" screening requirements and reduce cost. Lead detailed data analysis methods to correlate field/customer failures with internal production data to help understand root cause, risk, and exposure.

 

What We Need To See: 

  • Master or above degree in Electrical Engineering/Computer Engineering/Physics with 2+ years of experience.

  • Experience in post-silicon characterization, correlation, qualification (including High-Temperature Operating Life / HTOL testing) and debug.

  • Knowledgeable in the area of ATE testing, DFT methodology, and CMOS device physics.

  • Familiarity with CPU architecture fundamentals (such as cache hierarchies, coherency fabrics, and multi-core power management) or automotive high-reliability product lifecycles.

  • Strength presenting & communicate to technical audiences and methodical problem-solving with critical thinking, solution focused and attention to detail.

  • Highly motivated with strong sense of ownership, have excellent interpersonal skills, and high sense of team-work with intellectual honesty.

 

Ways To Stand Out From The Crowd:

  • Articulate, good communication and logical thinking.

  • Understanding of DFT insertion techniques including SCAN, ATPG, MBIST and LBIST (Logic BiST for functional safety/in-field test).

  • Good understanding of Automotive Semiconductor Quality Standards, such as AEC-Q100 qualification pathways and ISO 26262 Functional Safety (FuSa) guidelines.

  • Familiarity with JMP related data analytic tools, python/java or any other scripting language for large-scale test data evaluation and screening limits (e.g., Part Average Analysis / PAT).

  • Experience with ATE test program, test system & hardware such as 93K, uflex etc. for complex SoC/CPU bring-up and debug, as well as utilizing Failure Diagnosis/Isolation tools to root cause fix Silicon manufacturing defects.

With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

Skills Required

  • Master's degree or above in Electrical Engineering, Computer Engineering, or Physics with 2+ years of experience
  • Experience in post-silicon characterization, correlation, qualification (including HTOL) and debug
  • Knowledge of ATE testing, DFT methodology, and CMOS device physics
  • Familiarity with CPU architecture fundamentals (cache hierarchies, coherency fabrics, multi-core power management) or automotive high-reliability product lifecycles
  • Strong presentation and technical communication skills; methodical problem-solving and attention to detail
  • Highly motivated, strong ownership, excellent interpersonal and teamwork skills
  • Understanding of DFT insertion techniques (SCAN, ATPG, MBIST, LBIST)
  • Understanding of automotive semiconductor quality standards (AEC-Q100) and ISO 26262 Functional Safety guidelines
  • Familiarity with JMP data analytics tools, Python/Java or other scripting for large-scale test data evaluation and PAT
  • Experience with ATE test programs, test systems & hardware (e.g., 93K, uflex) and failure diagnosis/isolation tools for SoC/CPU bring-up

NVIDIA Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about NVIDIA and has not been reviewed or approved by NVIDIA.

  • Equity Value & Accessibility Equity awards and a discounted ESPP are highlighted as core parts of total compensation, enabling employees to share in the company’s success. Stock-based compensation and the two-year lookback ESPP are consistently described as especially valuable.
  • Healthcare Strength Health coverage is portrayed as robust, with comprehensive medical, dental, and vision options alongside mental health support and on-site care resources. Employer HSA contributions and wellness perks reinforce the depth of the offering.
  • Retirement Support Retirement programs are depicted as strong, featuring a meaningful 401(k) match with Roth options and support for Mega Backdoor Roth contributions. These elements position long-term savings as a notable advantage of the total rewards package.

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The Company
HQ: Santa Clara, CA
21,960 Employees
Year Founded: 1993

What We Do

NVIDIA’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing — with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. Today, NVIDIA is increasingly known as “the AI computing company.”

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