Job Purpose:
Navitas Semiconductor (Nasdaq: NVTS) is a next-generation power semiconductor leader driving innovation in gallium nitride (GaN) and high-voltage silicon carbide (SiC) technologies. Our products enable faster, more efficient power delivery across AI data centers, high-performance computing, energy and grid infrastructure, and industrial electrification.
With more than 30 years of combined expertise in wide bandgap technologies, GaNFast™ power ICs integrate GaN power, drive, control, sensing, and protection, delivering faster power delivery, higher system density, and greater efficiency. GeneSiC™ high-voltage SiC devices leverage patented trench-assisted planar technology to provide industry-leading voltage capability, efficiency, and reliability for medium-voltage grid and infrastructure applications.
We are seeking a Principal/ Sr. Principal SiC Technologist to join our fast-growing, collaborative team. The ideal candidate is self-motivated, energetic, and able to thrive in a high-growth, innovative environment, contributing directly to technologies that are shaping the future of power electronics.
The SiC Technologist will provide technical leadership for Navitas U.S. government-funded and strategic power semiconductor programs focused on silicon carbide power devices, including high-voltage and ultra-high-voltage SiC MOSFETs, IGBTs, JBS/MPS diodes, PiN diodes, thyristors, pulsed-power switches, DSRDs, modules, and related process, packaging, and reliability technologies. This role is intended to build on Navitas (GeneSiC) long history of government-agency programs and awards spanning DOE energy-storage and grid applications, U.S. DoW high-power pulsed systems, high-voltage devices, and SBIR/STTR technology transition. The position will bridge advanced device technology, government program execution, customer engagement, compliance-driven delivery, and transition of funded R&D into manufacturable, high-reliability products for defense, aerospace, energy infrastructure, pulsed-power, industrial electrification, and critical infrastructure applications.
Key Responsibilities and Duties:
- Serve as a technical lead for Navitas/GeneSiC SiC power device programs funded by U.S. government agencies, including SBIR/STTR, DOE, DoD, Navy, NASA, national lab, and strategic public-private initiatives.
- Translate prior GeneSiC/Navitas government-program learnings into new program strategy across ultra-high-voltage MOSFETs, IGBTs, JBS/Schottky and PiN diodes, thyristors, pulsed-power switches, DSRDs, and SiC modules.
- Define and guide device technology roadmaps for 650 V to 6.5 kV-class SiC MOSFETs, diodes, and power modules aligned with program objectives, manufacturability, ruggedness, reliability, qualification, and application requirements.
- Lead device design reviews, TCAD/modeling assessments, process integration discussions, characterization plans, pulsed-power test strategies, harsh-environment validation, and failure-analysis activities.
- Translate government program goals into technical work packages, milestones, deliverables, risk registers, verification plans, technical data packages, and transition-to-manufacturing plans.
- Coordinate cross-functional execution across device engineering, process development, epitaxy, wafer fabrication, foundry partners, test, packaging, reliability, product engineering, quality, supply chain, and program management.
- Support proposal development, technical volumes, statements of work, costed work plans, milestone definitions, commercialization plans, data-rights inputs, and customer briefings for government opportunities.
- Prepare and present technical updates, design reviews, milestone reports, test evidence, and executive-level summaries for internal leadership, government customers, national labs, prime contractors, and strategic partners.
- Ensure program execution follows applicable export-control, controlled unclassified information, cybersecurity, documentation, government-property, deliverable, and customer-specific handling requirements.
- Identify technology gaps, recommend experiments, and drive data-based decisions to improve device performance, ruggedness, yield, reliability, qualification readiness, and transition from funded R&D to product platforms.
Required Qualifications
Basic
- Ph.D. in Electrical Engineering, Materials Science, Applied Physics, Semiconductor Device Engineering, Power Electronics, or a related technical field.
- 10+ years of experience in semiconductor device technology, with substantial experience in SiC power devices, wide-bandgap semiconductors, or high-voltage power electronics.
- Strong understanding of SiC device physics, MOS interface behavior, edge termination, avalanche ruggedness, short-circuit behavior, switching performance, radiation effects, and reliability mechanisms.
- Experience with high-voltage and ultra-high-voltage device characterization, pulsed-power testing, wafer-level probing up to 10 kV and beyond, reliability testing, ruggedness testing, failure analysis, and data-driven design-of-experiments.
- Ability to connect device-level technology choices to system-level needs in defense, aerospace, grid, pulsed-power, energy-storage, industrial electrification, and critical infrastructure applications.
- Ability to lead technical teams without direct authority and communicate effectively with engineering, operations, quality, business development, contracts, compliance, program management, and executive stakeholders.
- Experience preparing technical reports, milestone documentation, test evidence, proposal content, and customer briefings for complex R&D, SBIR/STTR, or product-development programs.
- U.S. person status (green card holder or US citizen) and ability to meet customer and export-control, ITAR requirements for U.S. government program work, where applicable.
Preferred
- Prior experience leading or supporting U.S. government-funded semiconductor, power electronics, defense, aerospace, Navy, DOE, NASA, DARPA, DMEA, ARPA-E, national lab, or critical-infrastructure programs.
- Direct experience with SBIR/STTR programs, including Phase I feasibility, Phase II development, commercialization planning, technical volume writing, milestone tracking, and transition to larger government or commercial programs.
- Working knowledge of CHIPS Act, Department of Defense, Department of Energy, NASA, DARPA, ARPA-E, DMEA, national lab, or other federally funded technology programs.
- Familiarity with ITAR, EAR, CUI, NIST 800-171/CMMC expectations, data-rights considerations, subcontractor flow-downs, and secure handling of sensitive technical information.
- Experience advancing technologies through readiness levels, prototype builds, foundry transfer, 150 mm or larger wafer manufacturing scale-up, qualification planning, reliability demonstration, and transition to production.
- Hands-on experience with SiC MOSFET/IGBT cell design, termination design, JBS/Schottky diode design, PiN diodes, thyristors, pulsed-power switching, oxide reliability, body diode degradation, gate reliability, or radiation/hard-environment considerations.
- Experience collaborating with external partners, including universities, national labs, defense primes, aerospace organizations, foundries, packaging houses, test labs, and government customers.
Government Program Responsibilities
- Partner with program management to maintain traceability between contract requirements, solicitation objectives, technical milestones, deliverables, risk mitigations, commercialization commitments, and customer reporting.
- Support technical compliance reviews for proposal submissions, statements of work, subcontractor activities, data rights, government-furnished information, deliverable formats, test reports, and documentation packages.
- Provide clear technical rationale for milestone achievement, including test evidence, design data, TCAD/modeling results, characterization results, reliability data, ruggedness data, and manufacturing-readiness indicators.
- Shape government proposals around GeneSiC/Navitas differentiators, including rugged SiC device design, high-voltage and ultra-high-voltage portfolios, harsh-environment capability, reliability-centered qualification, and transition from government-funded R&D to product platforms.
- Contribute to workforce development, domestic supply-chain strengthening, foundry strategy, technology-transition narratives, and manufacturing-readiness plans where required by government funding programs.
- Represent the company in technical exchanges, design reviews, program reviews, workshops, site visits, and partner meetings with government agencies, prime contractors, national labs, universities, and strategic partners.
Skills Required
- Ph.D. in Electrical Engineering, Materials Science, Applied Physics, Semiconductor Device Engineering, Power Electronics, or related field.
- 10+ years experience in semiconductor device technology with substantial SiC power device experience.
- Strong understanding of SiC device physics, MOS interface behavior, edge termination, avalanche ruggedness, short-circuit behavior, switching performance, radiation effects, and reliability mechanisms.
- Experience with high-voltage and ultra-high-voltage device characterization, pulsed-power testing, wafer-level probing up to 10 kV+, reliability and ruggedness testing, failure analysis, and DOE-driven experiments.
- Ability to connect device-level technology choices to system-level requirements for defense, aerospace, grid, pulsed-power, and industrial applications.
- Ability to lead technical teams without direct authority and communicate effectively across engineering, operations, quality, business development, contracts, compliance, program management, and executives.
- Experience preparing technical reports, milestone documentation, test evidence, proposal technical volumes, and customer briefings for complex R&D or government programs.
- U.S. person status (green card holder or U.S. citizen) and ability to meet export-control/ITAR requirements for U.S. government program work.
- Prior experience leading or supporting U.S. government-funded semiconductor, defense, aerospace, DOE, NASA, DARPA, DMEA, national lab, or SBIR/STTR programs.
- Direct experience with SBIR/STTR program phases, milestone tracking, commercialization planning, and transition to larger government or commercial programs.
- Familiarity with CHIPS Act, DoD/DOE/NASA/DARPA programs, ITAR, EAR, CUI, NIST 800-171/CMMC expectations, data-rights considerations, and subcontractor flow-downs.
- Experience advancing technologies through TRL/MRL readiness levels, foundry transfer (150 mm+), qualification planning, reliability demonstration, and production transition.
- Hands-on experience with SiC MOSFET/IGBT cell and termination design, JBS/Schottky/PiN diode design, thyristors, pulsed-power switching, gate/oxide/body-diode reliability, and radiation/harsh-environment considerations.
- Experience collaborating with external partners: universities, national labs, defense primes, foundries, packaging houses, and government customers.
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