Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
The Cadence Advantage
- The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
- Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
- The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success.
- Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests.
- You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.
Location: Pune/Bangalore
Experience: 8–12 Years
BE/BTech/ME/MS/MTech in Electrical/Electronic or equivalent
About the RoleWe are looking for a Principal Design Engineer to drive Synthesis, Logical Equivalence Checking (LEC), Conformal Low Power (CLP), and UPF/CPF-based power intent verification. This is an internally facing role contributing to flow methodology & root-cause resolution on synthesis, Logical Equivalence Checking (LEC), low-power sign-off.
Key Responsibilities- Drive methodology improvements and best-practice development across Synthesis, LEC, CLP and ECO flows.
- Own end-to-end LEC sign-off across multiple design blocks including debug of NEQs, aborts.
- Drive Physical synthesis closure on complex blocks including constraint development and PPA closure.
- CLP sign-off for low power intent designs: level shifter, retention, isolation, PSO strategy architecture, supply set/domain conflict resolution.
- Own technical documentation, status tracking, and write-ups across active blocks.
- 8–12 years of hands-on ASIC/SoC design experience with strong depth in Synthesis (Genus), LEC (Conformal), and Low Power.
- Proven experience across multi-corner, multi-mode sign-off considerations
- Strong scripting ability in TCL, Python, PERL etc.
- Deep understanding of ASIC flow interactions: RTL, synthesis, physical design handoff, DFT.
- Excellent written and verbal communication skills; comfortable owning technical documentation and cross-team discussions
- Proven track record and experience working in a fast-paced environment.
- Experience with physically aware synthesis flows
Regards
K Madhu Prasad
We’re doing work that matters. Help us solve what others can’t.Skills Required
- 8-12 years of hands-on ASIC/SoC design experience
- Strong expertise in synthesis, including Genus
- Strong expertise in Logical Equivalence Checking, including Conformal
- Strong low-power design and verification experience
- Experience with multi-corner, multi-mode sign-off
- Strong scripting ability in TCL, Python, and/or Perl
- Deep understanding of ASIC flow interactions across RTL, synthesis, physical design handoff, and DFT
- Excellent written and verbal communication skills
- Experience working in a fast-paced environment
- BE, BTech, ME, MS, or MTech in Electrical/Electronic Engineering or equivalent
- Experience with physically aware synthesis flows
Cadence Design Systems Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.
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Equity Value & Accessibility — A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
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Healthcare Strength — Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
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Leave & Time Off Breadth — Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.
Cadence Design Systems Insights
What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.
