Lead Engineer – PWB Layout and Electronic Design Engineer

Job Description SummaryThe primary role for this position is to perform component placement and routing of highly complex printed circuit boards for avionics products. In addition, the selected candidate will perform electronic design activities supporting the design and development of circuit card assemblies for avionics electronic equipment.
You will perform your job duties with some autonomy and be guided by standard work. The job allows modification of procedures and practices using continuous improvement, lean practices and structured problem-solving methods within GE’s Safety, Quality, Delivery and Cost principles.
Location: Grand Rapids, MI or Clearwater, FL
This position, which offers a blend of onsite and hybrid work arrangements, is based in Grand Rapids, MI or Clearwater, FL and necessitates a presence in the office for 2-3 days each week. An extensive corporate relocation package is also available for eligible candidates.

Job Description

Roles and Responsibilities:

• Collaborate with design team members including Circuit Design Engineers, Material Scientists, Manufacturing Engineers and our printed wiring board (PWB) Suppliers.

• Execute the design of high density/high speed PWBs

• Experience Siemens/Mentor Expedition, Altium Designer or Cadence Allegro.

• Create PWB stack-ups and via structures that meet design needs and are within PWB suppliers’ capabilities.

• Create PWB board parts, develop and enter layout constraints, conduct parts placement, complete routing and create PWB fabrication drawings and manufacturing data packages.

• Maintain, improve and execute Design for Manufacturing & Design rule checks.

• Select components and perform circuit design and schematic capture using Siemens/Mentor Expedition, Altium Designer and Cadence Allegro.

• Conduct electronic testing in a lab environment such as board bring up testing, integration testing of multiple circuit cards, and pre-qualification testing.

• Perform requirements development and reviews of requirements.

• Perform design analysis for circuit performance using tools such as LTSPICE and perform stress and derating analysis of components as used in circuit designs.

Required Qualifications:

• Bachelor’s degree in Electrical Engineering or equivalent experience.

• Minimum of 5 years of combined professional experience in PWB layout and circuit design using Siemens/Mentor Expedition, Altium Designer or Cadence Allegro.

• Knowledge of PWB design and fabrication process.

Eligibility Requirement (s):

• This position requires U.S. citizenship status.

Desired Characteristics:

• Ability to break down complex problems and apply critical thinking.

• Strong professional technical writing and technical communication.

• Experience with Gigahertz microprocessors, FPGA, CPLD, DDR3 or DDR4 memory, flash memory, Gigabit Ethernet, and PCIe.

• Experience with mixed signal board design; analog to digital converters, digital to analog converters, signal conditioning/filtering and various analog I/O circuits.

• Experience in High Density Interconnect (HDI) technologies (micro vias, buried / blind vias, back drilling) for IPC Class 3 board.

• Experience in PWB design of 5+ Gbps serial links. (10GBASE-KR, PCIe Gen3, Fiber Optics).

• Experience in board conducting simulations including Power Integrity (PI) and Signal Integrity (SI).

• Familiarity with the Mentor Graphics Expedition Enterprise and Hyperlinx PI/SI.

• Familiarity with OrCAD PSPICE or LT Spice, Mathcad, Microsoft Office, Microsoft Visio.

• Experience with VPX, CAN, MIL-STD-1553, ARINC 429 and ARINC 664 and other MIL/AERO/Avionics standards.

The starting base pay range for this position is $95,000.00 - $159,000.00 USD Annual. The specific pay offered may be influenced by a variety of factors, including the candidate’s experience, education, and skill set. This position is also eligible for an annual discretionary bonus based on a percentage of your base salary/ commission based on the plan. This posting is expected to close on 8/31/26.​

GE Aerospace offers comprehensive benefits and programs to support your health and, along with programs like HealthAhead, your physical, emotional, financial and social wellbeing. Healthcare benefits include medical, dental, vision, and prescription drug coverage; access to a Health Coach from GE Aerospace; and the Employee Assistance Program, which provides 24/7 confidential assessment, counseling and referral services. Retirement benefits include the GE Aerospace Retirement Savings Plan, a 401(k) savings plan with company matching contributions and company retirement contributions, as well as access to Fidelity resources and planning consultants. Other benefits include tuition assistance, adoption assistance, paid parental leave, disability insurance, life insurance, and paid time-off for vacation or illness. ​

GE Aerospace (General Electric Company or the Company) and its affiliates each sponsor certain employee benefit plans or programs (i.e., is a “Sponsor”). Each Sponsor reserves the right to terminate, amend, suspend, replace or modify its benefit plans and programs at any time and for any reason, in its sole discretion. No individual has a vested right to any benefit under a Sponsor’s welfare benefit plan or program. This document does not create a contract of employment with any individual.

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This role requires access to U.S. export-controlled information. Therefore, employment will be contingent upon the ability to prove that you meet the status of a U.S. Person as one of the following: U.S. lawful permanent resident, U.S. Citizen, have been granted asylee or refugee status (i.e., a protected individual under the Immigration and Naturalization Act, 8 U.S.C. 1324b(a)(3)).

Additional Information

GE Aerospace will only employ those who are legally authorized to work in the United States for this opening. Any offer of employment is conditioned upon the successful completion of a drug screen (as applicable). Employees may also be subject to random and reasonable-suspicion drug and alcohol testing.