Layout Engineer

Posted 4 Days Ago
Be an Early Applicant
2 Locations
In-Office
108K-173K Annually
Senior level
Software • Semiconductor • Manufacturing
The Role
The Layout Engineer will develop and verify layouts for high-speed analog and mixed-signal circuits, focusing on power optimization and performance within state-of-the-art integrated circuits.
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Job Description:

Analog/Mixed Signal Layout Engineer

This position is part of a highly skilled multi-geographical team tasked with the development of high speed analog, mixed-signal IPs covering HBM, UCIe, PLL, and many others areas using the latest 3nm and 2nm FinFET technology. The team will be developing  key differentiating IPs used in the Artificial Intelligence, Machine Learning, High Performance Computing and Hyper-Scale Data Center markets. Each member of the team is expected to be committed to the team success, create new innovation, and ensure customer usage satisfaction with first time right quality mindset.

Responsibilities: 
Layout and verification of circuits to be used as part of state-of-the-art integrated circuits including:

  • PLLs, Phase Interpolators

  • High speed clock distribution networks

  • Rx Decision-Feedback Equalizers and deserializers

  • TX drivers and serializers

  • High Speed DACs and ADCs

This role involves:

  • Developing detailed layout and performing all necessary verifications.

  • Optimizing layout of circuits for power, performance, and integration to higher level IP / SOCs.

Knowledge and Experience:  

  • The position requires extensive experience with layout of high-speed custom analog and digital circuits in area(s) like Serdes, HBM, UCIe and PLL.

  • The candidate should be extremely familiar with the use of the Cadence Virtuoso tool suite to design and verify high-speed custom circuits, including Virtuoso schematic capture and layout. Innovus a plus.

  • Design experience in advanced FinFET nodes is required.

  • The ideal candidate will have wide-ranging experience, with a demonstrated ability to rely on both thorough understanding of layout fundamentals and creativity to solve circuit layout issues and problems.

Education:

  • BS degree in Electrical Engineering/related field and 8+ years of related years of experience or MS degree in Electrical Engineering/related field and 6+ years of related experience is strongly preferred

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $108,000 - $172,800

 

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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The Company
HQ: San Jose, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

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