As an IP Design Verification Engineer, you will be responsible for ensuring the quality and functionality of critical IP designs through rigorous verification processes. Using industry-standard tools and methodologies, you will create and execute test plans, identify and resolve bugs, and contribute to delivering robust IP solutions. Your work will directly support the development of innovative technologies that power Intel's products and strengthen their position in the market.
Business group
The Data Center Group (DCG) focuses on developing advanced technologies that accelerate data processing and storage solutions for diverse industries. This group drives innovation in hardware and software, delivering cutting-edge products to serve growing market demands. As part of DCG, you will collaborate with teams working to redefine the capabilities of data center infrastructure, supporting Intel's mission to enable a smarter, connected world.
Key Responsibilities
- Develop and implement test plans and verification strategies for IP designs using industry-standard tools and methodologies.
- Identify, debug, and resolve design and verification issues to ensure robust functionality and quality.
- Collaborate closely with cross-functional teams, including design, architecture, and validation teams, to identify and address potential challenges.
- Generate comprehensive documentation for verification processes, test results, and design improvements.
- Continuously improve verification efficiency through automation and innovative practices.
This is an entry level position. You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates. This position is not eligible for Intel immigration sponsorship
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with +1 year of hands-on experience.
- +6 months of experience in:
- Hardware description languages such as Verilog or VHDL.
- Hands-on experience with verification tools like SystemVerilog, UVM, or similar environments. -
- Digital design principles and computer architecture.
Preferred Qualifications
- Familiarity with scripting languages such as Python or Perl for automation purposes.
- Strong analytical thinking and problem-solving skills to debug complex issues.
- Familiarity with AI tools such as Claude, Copilot, Codex, etc.
Join us in driving innovation and shaping the future of data center technologies. Together, we can make a lasting impact on the world of computing.
Job Type:College GradShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, Massachusetts, Beaver BrookPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Skills Required
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
- At least 1 year of hands-on industry-relevant experience, internship experience, or schoolwork/classes/research
- At least 6 months of experience with hardware description languages such as Verilog or VHDL
- At least 6 months of experience with verification tools such as SystemVerilog, UVM, or similar environments
- At least 6 months of experience with digital design principles and computer architecture
- Familiarity with Python or Perl for automation
- Strong analytical thinking and problem-solving skills for debugging complex issues
- Familiarity with AI tools such as Claude, Copilot, or Codex
Intel Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.
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Leave & Time Off Breadth — Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
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Parental & Family Support — Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
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Healthcare Strength — Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.
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What We Do
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