Jobs at Intel

Leads large-scale technical programs spanning design-technology co-optimization, circuit design, foundational IP, and design enablement. Partners with engineering teams, customers, EDA vendors, and ecosystem stakeholders to align technical strategy, drive execution, improve organizational processes, and represent program roadmaps to senior leadership. Responsibilities also include mentoring engineers, workforce development, hiring, training, budget planning, and organizational transformation.

Leads business development for Intel’s neuromorphic computing portfolio, identifying strategic opportunities across robotics, edge AI, autonomous systems, sensing, communications, and aerospace. Builds customer and partner relationships, drives evaluations and proof-of-concepts toward commercial deployment, develops ecosystem partnerships, translates market needs into product priorities, assesses competitors and trends, shapes go-to-market strategies, represents the lab externally, and manages the opportunity pipeline.

Develop and maintain frontend and backend applications for semiconductor manufacturing and factory automation systems. Design scalable automation solutions, implement testing across multiple levels, automate CI/CD processes, troubleshoot deployed systems, and collaborate cross-functionally on requirements and architecture. The role also applies Agentic AI and GenAI platforms to improve manufacturing automation and decision-making.

Installs, maintains, and supports semiconductor design and compute environments, including EDA tools, automation scripts, design flows, licenses, PDKs, and compute capacity. Resolves tool and methodology issues through tapeout, supports design ramp-up with training and documentation, collaborates with EDA providers and engineering teams, and integrates new tools and methods into scalable workflows.

Designs, develops, tests, and maintains front-end and back-end software for semiconductor factory automation and Statistical Process Control systems. Responsibilities include database and application releases, secure coding, automated builds and deployments, technical documentation, troubleshooting, and cross-functional collaboration. The role also develops data-driven solutions using machine learning, statistical analysis, and optimization algorithms while supporting Intel’s manufacturing operations.

Design and develop RTL and microarchitecture for AI SoCs, including logic coding, simulation, IP integration, and optimization for power, performance, area, and timing. The role also involves reviewing verification plans, resolving RTL test failures, applying secure design practices, and ensuring quality compliance through IP and SoC handoff.

Design and develop CPU logic and RTL based on architecture and microarchitecture specifications. Optimize designs for power, performance, area, and timing; validate functionality through simulation and debugging; document microarchitectural specifications; and collaborate with architecture, verification, physical design, and SoC integration teams.

Develops and executes global integrated marketing campaigns for Intel consumer and gaming products. The role coordinates product, sales, retail, regional, agency, OEM, influencer, and partner teams across campaign planning, claims integration, activation, optimization, and reporting. Responsibilities include managing assets and approvals, supporting co-marketing and influencer programs, establishing KPIs, analyzing performance, and communicating insights. The specialist ensures campaigns meet business objectives, remain technically and legally accurate, launch on time and within budget, and improve brand awareness, consideration, demand, and conversion.

Develop and optimize open-source AI frameworks for LLM inference on Intel GPUs. Responsibilities include writing compute kernels, tuning distributed execution, optimizing computational graphs, profiling workloads, improving performance across hardware backends, and building testing and regression coverage. The role contributes to projects such as vLLM and PyTorch while collaborating with framework, compiler, machine learning, and open-source engineering teams.

Design, implement, verify, and support EDA tools, hardware design flows, methodologies, platforms, databases, and scripts. Optimize hardware development for power and performance, test next-generation tools, integrate designs into hierarchical systems, and collaborate with EDA vendors and engineering teams. The role requires knowledge of digital design, verification, physical layout, chip integration, clocking, and timing.

Develops and enhances EDA tools, digital implementation and signoff flows from RTL to GDS, and automation methodologies for advanced technology nodes. Responsibilities include flow architecture, hardware design verification, IP integration, timing and clocking analysis, tool and script optimization, vendor collaboration, and technology transition enablement. The role also supports source control, continuous integration, cloud infrastructure, and compute allocation while contributing strategic expertise on EDA industry trends.

Supports semiconductor fabrication facilities by developing and ramping manufacturing processes, analyzing factory metrics, improving operational efficiency, troubleshooting reporting systems, inspecting equipment, and implementing automation capabilities. The role partners with operations, engineering, and automation teams to resolve technical issues, meet production targets, establish manufacturing requirements, and maintain product and process documentation.

Analyze semiconductor manufacturing, defect, and electrical data to identify yield limiters, improve process performance, conduct fault isolation, and develop yield models and measurement methodologies. Collaborate with design, test, and manufacturing teams to resolve quality issues and support advanced logic-node capabilities.

Leads physical implementation of next-generation CPU IPs from floorplanning through signoff. Oversees placement, clock tree synthesis, routing, timing and physical verification, while driving power, performance, and area optimization. Partners with architecture, RTL, CAD, DFT, power, and signoff teams to resolve complex implementation challenges, improve methodologies, adopt automation and AI-driven workflows, mentor engineers, and support planning, hiring, and execution tracking.

Designs, implements, analyzes, and optimizes clock distribution networks for high-performance CPU and SoC products. Responsibilities include clock architecture, clock tree synthesis, timing analysis and closure, custom circuit and library-cell development, low-power optimization, design automation, and cross-functional collaboration across architecture, physical implementation, validation, and EDA teams.

Develop and validate testability circuits and production test methods for analog and RF integrated circuits. Design and debug ATE software, correlate ATE results with design validation, characterize circuit performance, optimize production yield, and support thermal and power testing. Collaborate with design teams on DFT, calibration, trimming, datasheet specifications, production ramp, and post-release issue resolution.

Develop and deploy automation frameworks for physical design signoff across RC extraction, STA, ERC, power integrity, and signal integrity. Automate checks, debugging, reporting, and data analysis; resolve signoff issues; improve methodology, convergence, quality, and correlation; collaborate with design, CAD, and EDA vendor teams; and build dashboards to monitor signoff health and project readiness.

Design, implement, analyze, and optimize clock distribution networks for high-performance CPU and SoC products. The role includes clock architecture, clock tree synthesis, timing analysis and closure, custom circuit and library-cell development, PPA optimization, automation, and cross-functional collaboration across architecture, physical design, validation, and EDA teams.

Designs, tests, verifies, and validates analog components for semiconductor products. Responsibilities include collaborating with design, test, and manufacturing teams; analyzing test data; improving product performance and reliability; documenting development processes; and supporting product qualification and troubleshooting. Requires knowledge of analog circuit design, test equipment, circuit characterization, debugging, data analysis, and programming for test automation.

Develop verification plans and test content for next-generation USB IP. Build testbench infrastructure including monitors, scoreboards, checks, and BFMs; create coverage points and assertions; debug failing tests; improve validation efficiency and support SoC and subsystem validation environments.