Jobs at Intel

Develops and optimizes semiconductor manufacturing processes, equipment, materials, and metrology for advanced device architectures and high-volume production. Responsibilities include process pathfinding, parameter optimization, technology roadmap development, supplier collaboration, equipment and process improvements, and structured troubleshooting. The role requires semiconductor processing or cleanroom experience, statistical process control, design of experiments, and wafer-level assembly or fab technology development.

Develop scalable verification plans, test benches, and environments for complex SoC designs. Execute emulation and system simulation tests, debug presilicon issues, improve functional verification infrastructure, and collaborate with architecture, RTL, physical design, and postsilicon teams. Integrate security coverage, maintain test plans, and incorporate postsilicon feedback into presilicon verification strategies.

Develops and improves photolithography mask manufacturing processes and equipment for advanced semiconductor technologies. Responsibilities include equipment installation, maintenance, troubleshooting, defect analysis, process experiments, control-system development, and improvements in quality, yield, reliability, cost, productivity, and safety. The engineer collaborates cross-functionally, analyzes complex process issues, and establishes sustainable solutions. The role requires a PhD in a relevant science or engineering field and is performed onsite in Hillsboro, Oregon.

Perform failure analysis on silicon devices using TEM, SEM, FIB/PFIB and nanoprobing. Execute electrical probing, interpret IV/CV data, isolate faults, and drive root-cause. Integrate probing with FA workflows, improve methods/BKMs, support tool ownership, mentor junior staff, and participate in yield improvement and process transfer activities.

Leads pre-silicon functional verification of Intel NPU AI accelerator hardware. Responsibilities include architecting verification environments, developing test plans, random generators, BFMs, checkers, scoreboards, coverage models, assertions, and software-based functional and performance tests. The role partners with design, model, and architecture teams to validate complex digital blocks, achieve coverage closure, sign off designs, and influence future AI hardware products.

Lead technical improvements in global network operations to increase reliability, incident response, change quality, and operational readiness. Drive operational deployments of new network products, establish standards and runbooks, mentor engineers, coordinate cross-functional teams, and use metrics and monitoring to reduce incidents and improve service health across enterprise, manufacturing, campus, data center, wireless, and WAN environments.

Develop, test, deploy, and maintain factory and planning applications supporting Intel manufacturing operations. Work across application architecture tiers, maintain development and test environments, integrate technologies, apply software engineering and usability principles, and monitor system performance. Collaborate with technical leads, project managers, developers, and global stakeholders to deliver scalable, reliable solutions.

Develop and deploy high-accuracy, high-speed material handling systems for advanced semiconductor packaging. Responsibilities include creating process recipes, designing and validating nozzle tooling, troubleshooting manufacturing-floor equipment, testing hardware and software upgrades, and deploying solutions to high-volume manufacturing sites. The role drives improvements in quality, reliability, cost, yield, productivity, process stability, safety, and ergonomics while applying engineering principles to automated handling technologies.

Manage semiconductor tool installation and qualification milestones from design through SL2 signoff. Coordinate construction, manufacturing, OEMs, contractors, and suppliers; develop schedules, manage scope, validate readiness, resolve qualification issues, and oversee vendor performance. The role also supports safety, compliance, budget monitoring, Lean improvement, resource planning, equipment delivery, and construction-to-qualification handoffs. This is a three-year contract requiring five days per week onsite in a cleanroom and construction environment.

Partners with senior executives and leadership teams to diagnose organizational challenges and improve organization, leadership, and team effectiveness. Advises on organization design, operating models, talent strategy, succession, leadership development, executive transitions, and enterprise transformation. Designs and facilitates interventions, coaches leaders, uses organizational data and analytics, and leads change initiatives aligned with business objectives.

Drive semiconductor tool installation, readiness, and qualification milestones from pre-design through SL2 signoff. Coordinate construction, design, manufacturing, OEM, contractor, and supplier stakeholders; manage schedules, scope, testing, resources, budgets, vendors, and quality. Ensure safety, cleanroom compliance, facility readiness, and timely equipment delivery. Lead continuous improvement, apply Lean principles, manage supplier performance, and reduce installation duration and late-stage changes.

Own physical design and implementation of CPU core blocks from RTL through GDS. Responsibilities include synthesis, floorplanning, place and route, timing and power analysis, physical verification, PPA optimization, issue resolution, flow automation, and cross-functional collaboration. The role also contributes to design methodologies and guides junior engineers while working on advanced semiconductor process nodes.

Own and optimize high-volume manufacturing equipment and processes for semiconductor assembly/test. Perform tests and measurements, implement process improvements, manage equipment installation and qualification, drive capacity expansion, execute maintenance and continuous improvement, collaborate with suppliers and cross-functional teams, and support technology transfers to enable scalable, high-quality production.

Drive quality and reliability qualifications for high-volume semiconductor manufacturing ramps. Evaluate materials, processes, and equipment; conduct audits; specify inspection and testing; analyze reliability data; lead risk assessments, discrepancy containment, and continuous improvement initiatives. Collaborate with product engineering and manufacturing teams to improve designs, processes, cost, and production volume while addressing customer manufacturing concerns.

Design and integrate advanced packaging interposers for silicon-based quantum computing systems. Responsibilities include physical design, collaboration with silicon, signal integrity, power integrity, thermal, and system integration teams, DRC/LVS validation, milestone delivery, technical presentations, and documentation. The role also requires staying current with packaging technologies and design techniques while working in a multidisciplinary quantum computing research environment.

Designs and analyzes power delivery networks across silicon, packages, boards, and platforms. Responsibilities include power integrity modeling, noise analysis, electrical characterization, test structure and verification plan development, measurement correlation, decoupling optimization, and defining power and voltage regulation specifications. Collaborates with silicon integration, die floor planning, package design, and platform teams to ensure power noise meets SoC performance and functionality requirements.

Leads thin-film deposition process engineering for PVD, CVD, and ALD technologies in high-volume semiconductor manufacturing. Owns process and equipment performance, drives yield and defect improvements, develops manufacturing technologies, supports capacity expansions and technology transfers, and leads equipment installation and qualification. Collaborates with vendors and cross-functional teams to troubleshoot issues, conduct root-cause analysis, improve process control, and enable stable ramp-to-volume production.

Design large-form-factor IC substrates for Intel’s quantum computing systems using Siemens Xpedition. Responsibilities include high-speed routing, design validation with DRC and LVS, advanced 2.5D and 3D packaging integration, collaboration on signal, power, and thermal requirements, supplier tapeout, milestone communication, and technical documentation. The role requires substantial IC substrate design experience and supports innovative silicon quantum dot processor development.

Manage Intel’s relationship with Dell ISG, driving sales strategy, design wins, Xeon and AI accelerator adoption, and customer roadmap alignment. Lead technical and sales engagements for Dell PowerEdge and AI server programs, coordinate engineering, product, marketing, and program teams, resolve escalations, develop account strategies, deliver technical presentations, and build executive-level customer relationships. The role requires technical understanding of data center and AI infrastructure markets, OEM/ODM experience, and strong communication and negotiation skills.

Leads large-scale global IT projects and programs from planning through closeout. Responsibilities include managing scope, schedules, budgets, resources, risks, governance, testing, documentation, training, change control, executive reporting, and cross-functional dependencies. The role drives strategic technology outcomes, monitors program health, removes delivery roadblocks, and promotes continuous improvement across Intel’s global IT organization.