Develop advanced physical verification solutions and methodologies for PDKs, including runset development and QA workflows, leveraging various EDA platforms.

Develop advanced PDK ESD protection verification solutions, collaborate with validation teams, and advance verification methodologies. Must have strong experience in EDA tools and scripting.

The role involves designing and executing experiments for semiconductor devices, analyzing data, and ensuring readiness for high volume manufacturing. It requires leading research on advanced device architectures and interfacing with design partners to address issues.

This role focuses on PDK development within a team at Intel, requiring collaboration with design teams and expertise in various technical areas to produce quality PDKs.

The Extraction Expert will develop and support extraction solutions for parasitic extraction workflows, demonstrating strong leadership and stakeholder management skills.

The role involves designing and delivering software solutions for factory automation, optimizing manufacturing processes, and collaborating with engineering teams in semiconductor manufacturing.

This role involves designing and implementing SAP solutions for Supplier Invoicing and Payments, working with stakeholders, and improving processes in a global team.

The Senior Device Engineer will lead projects on HVM yield, collaborate with teams on device tech development, and optimize processes for production requirements.

The Tax Manager/Specialist ensures effective tax compliance and reporting, manages tax processes, builds relationships with stakeholders, and aids in global tax strategies.

The Graduate Talent Program at Intel involves hands-on training, collaboration on projects, and skill development in various engineering fields.

The Payroll Specialist prepares payroll information, manages employee master data, resolves payroll issues, and conducts payroll audits, ensuring compliance with policies. They collaborate with Finance and other teams on payroll communications and improvements.

The Memory Design Engineer designs and optimizes digital circuits for various memory types, focusing on power, performance, area, and reliability while collaborating cross-functionally.

The DFT Design Engineer will implement DFT capabilities in silicon designs, manage testing strategies, and collaborate on architecture definition and verification of SoC, ensuring high-quality integration of IP blocks.

The role involves analyzing and improving HR processes, managing projects, performing data analysis, and collaborating with stakeholders to enhance employee experience.

The role involves developing RTL designs for IP, debugging failures, ensuring design integrity, and engaging in technical discussions. Requires strong communication and technical skills.

The HR Management Systems Analyst supports human resources software solutions, serves as a technical liaison, and maintains HR management systems while ensuring data integrity and system operations.

The role involves managing complex foundry technology programs, ensuring customer satisfaction through effective integration of design and manufacturing processes, while building strong relationships with stakeholders.

Lead the development and deployment of EOS rule decks for Intel Foundry, ensuring integration with design and troubleshooting issues, while mentoring others on reliability methodologies.

The Integration Manager oversees semiconductor manufacturing processes, ensuring qualification, yield, and cost requirements, while coordinating with various teams and driving process improvements.

As a Software Application Development Engineer, you will develop automated solutions, lead teams in AI/ML integration, design architectures, and oversee full-stack development tasks.