IC Verification Engineer

Posted Yesterday
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San Jose, CA, USA
In-Office
144K-230K Annually
Expert/Leader
Software • Semiconductor • Manufacturing
The Role
Architects and develops reusable ASIC verification environments using SystemVerilog and UVM/VMM. Leads test planning, functional coverage, pseudo-random testing, regression debugging, verification closure, and documentation across block, core, and SoC designs. Requires leading verification through a complete ASIC cycle from architecture to tapeout, understanding complex protocols such as PCIe, and mentoring junior engineers.
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Job Description:

Responsibilities:

  • Architect and develop scalable and reusable Testbench environment using the framework of Verification Methodologies.

  • Drive Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.

  • Build pseudo-random tests to verify and get to full Functional coverage and bring the Verification to closure

  • Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps

  • Work with other members of the team, guide/mentor junior team members

  • Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture.

  • Driver Verification quality and Efficiency improvements

Mandatory Requirements:

  • Bachelor’s degree in Electrical/Electronics/Equivalent with 12+ years of relevant experience; or Master’s degree in Electrical/Electronics/Equivalent with 10+ years of relevant experience

  • 10+ years of experience in developing complex Verification Environments, developing Test plans, Functional coverage and pseudo-random testing

  • Must have gone through a full ASIC cycle right from Architecture development to Tapeout with full focus on Verification leading a Core

  • Very proficient in System Verilog and Verification Methodologies like UVM/VMM

  • Good debug skills in analyzing regression failures and understanding of complex designs

  • A good understanding of a complex protocol like PCI Express or other multi-layered protocol

These requirements are a plus:

  • Experience in PCIe protocol

  • Comfort with Makefiles

  • Experience with Verifying with other protocols like AXI


Compensation and Benefits


The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

  • Bachelor's degree in Electrical Engineering, Electronics Engineering, or equivalent, with 12+ years of relevant experience; or master's degree with 10+ years of relevant experience
  • 10+ years of experience developing complex verification environments, test plans, functional coverage, and pseudo-random testing
  • Experience completing a full ASIC cycle from architecture development through tapeout, with a primary focus on verification leadership for a core
  • Very strong proficiency in SystemVerilog and verification methodologies such as UVM or VMM
  • Strong debugging skills for regression failures and complex designs
  • Understanding of complex, multilayered protocols such as PCI Express
  • Experience with PCIe protocol
  • Comfort with Makefiles
  • Experience verifying protocols such as AXI

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

  • Equity Value & Accessibility Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
  • Retirement Support A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
  • Pay Growth & Progression Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.

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The Company
HQ: Palo Alto, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

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