Broadcom

IC Verification Engineer

Posted 7 Hours Ago

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San Jose, CA, USA

In-Office

144K-230K Annually

Expert/Leader

Software • Semiconductor • Manufacturing

The Role

Architect and develop reusable ASIC verification environments using SystemVerilog and UVM/VMM. Create test plans, functional coverage, and pseudo-random tests for block, core, and SOC designs. Debug regression failures, close coverage gaps, document verification strategies, improve verification quality and efficiency, collaborate with design and architecture teams, and mentor junior engineers through the ASIC lifecycle from architecture to tapeout.

Summary Generated by Built In

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Job Description:

Job duties include:

Architect and develop scalable and reusable Testbench environment using the framework of Verification Methodologies.
Drive Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.
Build pseudo-random tests to verify and get to full Functional coverage and bring the Verification to closure
Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps
Work with other members of the team, guide/mentor junior team members
Think differently and out-of-the-box to stress the DUT and verify it in an efficient way.
Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture.
Driver Verification quality and Efficiency improvements

Mandatory Requirements:

Bachelor's degree in Electrical/Electronics/Equivalent with 12+ years of experience; or Masters degree in Electrical/Electronics/Equivalent with 10+ years of experience
10+ years of experience in developing complex Verification Environments, developing Test plans, Functional coverage and pseudo-random testing
Must have gone through a full ASIC cycle right from Architecture development to Tapeout with full focus on Verification
Very proficient in System Verilog and Verification Methodologies like UVM/VMM
Good debug skills in analyzing regression failures and understanding of complex designs
A good understanding of a complex protocol like PCI Express or other multi-layered protocol
Work with the team and mentor junior engineers

These requirements are a plus:

Experience in PCIe protocol
Scripting knowledge of Python or Perl
Comfort with Makefiles
Experience with Verifying with other protocols like AXI

Compensation and Benefits

The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

Bachelor's degree in Electrical Engineering, Electronics Engineering, or equivalent, plus 12 or more years of experience
Master's degree in Electrical Engineering, Electronics Engineering, or equivalent, plus 10 or more years of experience
10 or more years of experience developing complex verification environments, test plans, functional coverage, and pseudo-random testing
Experience completing a full ASIC cycle from architecture development through tapeout with a focus on verification
Advanced proficiency in SystemVerilog and verification methodologies such as UVM or VMM
Strong debugging skills for analyzing regression failures and understanding complex designs
Understanding of a complex protocol such as PCI Express or another multilayered protocol
Ability to collaborate with teams and mentor junior engineers
Experience with the PCIe protocol
Scripting knowledge in Python or Perl
Comfort with Makefiles
Experience verifying protocols such as AXI

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

Equity Value & Accessibility — Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
Retirement Support — A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
Pay Growth & Progression — Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.