High-Speed I/F Engineering Manager

Posted 7 Days Ago
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Hiring Remotely in Kodair, Mahbūbnagar, Telangāna, IND
Remote
Entry level
3D Printing
The Role
Leads High-Speed Interface subsystem design and development for automotive SoCs, including PCIe, UCIe, USB, and UFS. Defines architecture, makes technical decisions, oversees design reviews and verification, coordinates third-party IP vendors, resolves technical issues, and manages a distributed engineering organization across Japan, India, and Vietnam. Balances performance, power, quality, schedule, and resources while developing long-term technical and organizational capabilities.
Summary Generated by Built In
Job Description

【Background of the Recruitment】

As automotive electrification and intelligence continue to accelerate, automotive SoCs have become a core technology that directly influences vehicle value.
The R-Car series has evolved into a large-scale, high‑performance automotive SoC by integrating a wide range of IPs, including CPU, high‑speed interfaces, memory, AI/video, functional safety, and security.
To continuously deliver next‑generation automotive SoCs, our organization is strengthening its SoC IP development capabilities, covering not only in‑house IP development but also the selection, integration, and deployment of third‑party IPs.
In particular, within core domains such as the High-Speed I/F subsystem, the increasing scale and technical complexity of development have further raised the need for leaders who can contribute from both technical and organizational perspectives.
This position is intended for professionals who can lead High-Speed I/F subsystem development while driving long‑term organizational capability, thereby contributing to the sustained evolution of our development organization.

【Job Description】

  • Serve as an Engineering Manager responsible for leading the High-Speed I/F  subsystem design and development for automotive SoCs (R-Car series), with accountability for both technical decision‑making and organizational leadership.
  • Define and drive the specification and architectural direction of the High-Speed I/F subsystem, including PCIe, UCIe, USB and UFS‑related areas, ensuring quality through design reviews and sound technical judgment.
  • Make prioritization decisions and final judgments at the subsystem level, balancing performance, power, quality, schedule, and resource constraints.
  • Work closely with SoC architects, other subsystem owners, and project management, promoting overall SoC optimization through cross‑functional coordination.
  • Take ownership of resolving critical technical and organizational issues that arise during the design and verification phases.
  • Oversee technical coordination with third‑party IP vendors, including specification alignment, constraint clarification, and issue resolution.
  • Manage a global development organization across Japan, India, and Vietnam, driving role definition, team development, and sustainable execution capability.

※The full details regarding your position scope as well as any future potential changes in work location and job scope will be provided during the interview process.

Qualifications

【MUST】

  • Experience serving as a technical lead at subsystem or IP level, including responsibility for design reviews, technical decisions, and design direction.
  • Proven ability to coordinate multiple engineers and stakeholders and drive development forward.
  • Ability to work in English in technical discussions and coordination within a global development environment.
  • Japanese language proficiency at a business level

【WANT】

  • Experience in a people‑management role, such as Engineering Manager, Section Manager, or equivalent.
  • Experience managing multi‑member and/or multi‑site teams, including offshore development.
  • Experience contributing to resource planning, role assignment, and team development.
  • Experience participating in mid‑ to long‑term technical roadmap or organizational planning.
  • Experience in technical communication with third‑party IP vendors or partners
    (e.g., specification confirmation, constraint alignment, issue resolution).
  • Hands‑on experience in specification, design, or verification of High-Speed I/F such as PCIe, UCIe, USB, and UFS.
  • Experience in automotive SoC development or projects with high quality and/or functional safety requirements.
  • Knowledge of power domain separation and physical implementation considerations (e.g., P&R).

Additional Information

ルネサスは、「To Make Our Lives Easier(人々の暮らしをより豊かで快適にする)」というPurposeのもと、組込み半導体ソリューションを提供するグローバル企業です。世界30か国以上で活躍する21,000人を超えるエンジニアや課題解決のプロフェッショナルとともに、自動車、産業、インフラ、IoT分野における世界最先端のテクノロジー開発に携わり、より安全で、健康的で、環境にやさしく、スマートな未来の実現に貢献しています。 

 

ルネサスでは、「TAGIE(Transparent、Agile、Global、Innovative、Entrepreneurial)」を企業文化の中核としています。TAGIEは、私たちの働き方や成長のあり方、そしてPurposeの実現に向けた取り組みを支える共通の価値観です。この協調的な精神と挑戦するマインドセットが、半導体技術を通じた産業の変革と、世界中の人々の暮らしへの貢献を可能にしています。 

 

私たちは、競争力のある報酬制度に加え、充実した福利厚生をご用意しています。福利厚生の詳細については、選考プロセスの中でご案内いたします。 

 

私たちとともに未来を創造する挑戦に、ぜひ参加しませんか。皆さまからのご応募をお待ちしております。 

Skills Required

  • Technical lead experience at the subsystem or IP level, including design reviews, technical decisions, and design direction.
  • Experience coordinating multiple engineers and stakeholders to drive development forward.
  • Ability to work in English for technical discussions and coordination in a global development environment.
  • Business-level Japanese language proficiency.
  • People-management experience as an Engineering Manager, Section Manager, or equivalent.
  • Experience managing multi-member or multi-site teams, including offshore development.
  • Experience with resource planning, role assignment, and team development.
  • Experience with mid- to long-term technical roadmap or organizational planning.
  • Technical communication experience with third-party IP vendors or partners.
  • Hands-on experience specifying, designing, or verifying high-speed interfaces such as PCIe, UCIe, USB, or UFS.
  • Experience in automotive SoC development or projects requiring high quality or functional safety.
  • Knowledge of power domain separation and physical implementation considerations, including place-and-route.

Renesas Electronics Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Renesas Electronics and has not been reviewed or approved by Renesas Electronics.

  • Fair & Transparent Compensation Feedback suggests pay is generally fair-to-good across many roles, with base pay aligned to prevailing market levels in multiple U.S. locations. Engineering and leadership tracks can be competitive on total compensation, reinforcing a sense that pay can meet market expectations in key job families.
  • Healthcare Strength Feedback suggests core medical, dental, and vision coverage is solid and well-regarded by employees. Day-one eligibility in U.S. roles is described, supporting confidence in access and continuity of care.
  • Leave & Time Off Breadth Feedback suggests PTO, paid holidays, sick time, and parental leave provide a comprehensive time-off framework. Company initiatives like Renesas Day and meeting-light Focus Fridays further support time away and balance.

Renesas Electronics Insights

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The Company
HQ: Tokyo
10,040 Employees

What We Do

We're the world's leading semiconductor manufacturer. Our mission is to make our lives easier and a world that's safer, healthier, greener, and smarter.

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