Jobs at Renesas Electronics

The Staff Hardware Engineer will support NFC Point-Of-Sale and IoT domains, design PCBs, lead customer projects, and conduct RF measurements and EMC tests.

Lead B2B integration and EDI onboarding for trading partners: coordinate stakeholders, prepare and validate onboarding documentation, conduct partner testing, perform SAP IDoc mapping and interface configuration, and support technical/business communications to ensure successful adoption.

Design and architect Verilog RTL for mixed-signal memory buffer ASICs (DDR5/DDR6+), lead digital implementation (synthesis, STA, P&R hand-off), verification (formal, lint, CDC), DFT and gate-level debug, produce documentation, and mentor junior engineers.

The role involves executing RTL-to-GDSII flows, performing timing analysis, and verifying designs while collaborating with cross-functional teams on complex designs.

Design optimized digital blocks, develop TCL scripts, ensure compliance with specifications, support DFT strategy, conduct verification planning, and produce documentation.

Administer and integrate requirements management tools (Polarion, Jama, DOORS, R4J, etc.), design traceability and reporting solutions, coach engineers on best practices and aSPICE compliance, drive tool architecture and performance, provide training, vendor liaison, and enable DevOps integrations to support software development quality and reuse.

Lead supplier quality analytics for outsourced foundry, assembly and test subcontractors. Build and maintain ELT pipelines, implement data validation and governance, develop real-time dashboards (Spotfire/PowerBI), perform statistical modeling to detect manufacturing drifts, and drive continuous improvement. Coordinate corrective actions with suppliers and provide weekend rotational support.

Lead a small data analytics engineering team to build ELT pipelines, ensure supplier data integrity, implement automated data validation, and create real-time dashboards (e.g., Spotfire). Use statistical modeling to detect and resolve manufacturing variability, support continuous improvement in semiconductor fab/assembly/test, and provide shift-based analytics support and feedback for rapid countermeasures.

Lead and manage an analog/power IC design team for BMS and power products. Provide technical project leadership, hands-on block-level analog design, mixed-mode simulations, layout guidance, lab evaluation, cross-functional coordination, customer engagement, and support tape-out, test development, and production ramp.

Lead supplier quality analytics for outsourced foundry, assembly and test partners. Build and maintain ELT pipelines, implement data validation and governance, create real-time dashboards (Spotfire/PowerBI), perform statistical analysis to detect drifts and defects, and drive continuous improvement and corrective actions. Support weekend rotation.

Design and deliver micro-architecture and front-end digital blocks for power management ASICs (PMIC). Lead RTL design in Verilog/SystemVerilog, CDC handling, synthesis, STA, formal verification, DFT support, silicon bring-up/debug, and P&R handoff. Produce specifications, test plans, constraints, and documentation while collaborating with cross-functional teams.

Lead analog layout design for DC-DC converters, controllers and drivers. Own floorplanning and full-chip layout, implement analog matching techniques, design for EM and reliability, drive DRC/LVS/PEX flows, collaborate globally, and minimize rework by following CAD and methodology guidelines.

Verify and validate PMIC embedded firmware in pre- and post-silicon environments by developing SystemVerilog testbenches, running RTL simulations and emulation, supporting silicon bring-up and characterization, creating automation scripts (Python/Perl), using lab equipment to debug hardware/firmware interactions, documenting test flows, and collaborating with cross-functional teams to resolve issues.

Lead synthesis, static timing analysis, and timing closure for low-power, chiplet-based MCU designs on mature process nodes. Drive RTL-to-gate flow, timing/power/area optimization, constraint alignment, ECO execution, and sign-off across modes and corners. Collaborate with RTL, DFT, physical design, verification, architecture, and package teams; evaluate EDA tools and improve automation and methodologies to meet power, performance, area, quality, and schedule targets.

Combine supplier quality engineering with data analytics to build ELT pipelines, validate data, create automated Spotfire/Power BI dashboards, perform statistical modeling to monitor and predict manufacturing variances, and drive continuous improvement with supplier and internal teams. Provides rotational weekend support.

Define and standardize functional safety (FuSa) architectures and requirements for PMICs, align with MCU/SoC teams, create reusable FuSa libraries, mentor FuSa engineers, drive tool-based FuSa workflows, liaise with customers and safety assessors, and optimize safety implementations for minimal cost and area.

Define product and system requirements for multiphase power solutions by collaborating with IC design, systems, marketing, and validation teams. Translate customer system needs into PRDs, use cases, and basic API definitions; evaluate trade-offs between features and schedules and support VR architecture decisions for high-current ASIC and server processor platforms.

The Principal Engineer will lead timing closure and synthesis for multi-die MCU designs, ensuring quality, power, and performance targets are met. Responsibilities include driving RTL-to-gate synthesis, optimizing design parameters, managing timing analysis, and collaborating with various design teams.

Lead supplier quality analytics for outsourced foundry, assembly, and test subcontractors. Build ELT pipelines, data validation, automated testing, and interactive dashboards (Spotfire/PowerBI). Use statistical modeling to track, predict, and resolve manufacturing variability, support continuous improvement, and provide weekend rotational support.

Lead quality improvement for new product introductions and volume ramp of semiconductor products. Define and track continuous improvement, analyze DPPM and returns, implement customer-specific requirements, coordinate cross-functional problem solving, ensure automotive standards compliance, engage with customer QA and suppliers, and represent on external standards committees.