Jobs at Renesas Electronics

Leads AI adoption and digital transformation across Global HR by developing the transformation roadmap, identifying and scaling AI use cases, automating HR workflows, driving change management, establishing AI governance, and building workforce capabilities. Partners with HR, IT, and business leaders while measuring productivity, employee experience, business impact, and ROI through analytics.

Supports semiconductor product engineering through test data analysis, product qualification, reliability testing, failure analysis, documentation, and productivity automation. The intern works on BMIC and battery charger IC products, develops scripts and dashboards, and collaborates cross-functionally while receiving structured mentorship and hands-on exposure to product development and manufacturing.

Leads company-wide workload and performance analysis, AI workload optimization, hardware/software co-design, and advanced SoC architecture methodologies. Defines strategic roadmaps, guides complex IP and subsystem development, establishes modeling and verification practices, and drives performance and power tradeoffs. Partners with product, platform, and executive teams while building engineering organizations and mentoring senior technical leaders. Requires deep semiconductor and SoC development expertise, advanced performance modeling experience, and a graduate degree in a relevant technical discipline.

Leads security strategy for Renesas embedded products across their lifecycle, from architecture through deployment. Drives product security alignment, regulatory compliance, certifications, standards participation, partner and customer engagement, and cross-functional execution. Provides cybersecurity training and technical enablement while guiding teams on cryptography, secure development, CRA, RED, IEC 62443, SESIP, PSA Certified, FIPS, and NIST requirements.

Manage and grow a territory-based portfolio of B2B accounts, drive Agile platform adoption, uncover customer needs, deliver tailored guidance and demonstrations, communicate technical value, handle objections, and close both quick-win and strategic opportunities. The role requires managing complex sales cycles, exceeding targets, influencing technical and business stakeholders, and supporting customers in English and French.

Architects, develops, verifies, and maintains embedded firmware for digital PWM voltage regulators and custom SoCs. Designs firmware interfaces with hardware teams, documents architecture, implements patches and hardware workarounds, brings up new silicon, and debugs issues with validation teams. Develops automated laboratory tests for firmware and supports products through high-volume manufacturing. The role requires advanced C and assembly skills, real-time optimization, RTOS knowledge, Verilog familiarity, scripting, and embedded systems debugging.

Leads the HR AI and digital transformation roadmap, identifying and scaling AI use cases, automating HR workflows, and improving employee services. Partners with HR, IT, and business leaders to drive adoption, change management, governance, workforce upskilling, and process innovation. Oversees pilots and proofs of concept while measuring productivity, business impact, and return on investment through analytics.

Manage and grow Altium’s customer base across India through new business development, upselling, cross-selling, renewals, and subscription retention. Build executive customer relationships, present value propositions, meet sales targets, maintain CRM records, execute customer campaigns, and collaborate with marketing and customer success teams. The role is office-based in Bangalore with potential travel throughout India and requires extensive SaaS sales experience, leadership capability, and familiarity with Salesforce and engineering software markets.

Provides technical leadership for semiconductor engineering compute, CAD, and design-data-management environments. Owns Perforce Helix and IPLM methodologies, project and workspace configuration, Linux infrastructure, automation, legacy data migration, documentation, training, and expert support. Develops Python and shell utilities, standardizes EDA workflows, and collaborates with engineering and IT teams to build scalable, globally consistent infrastructure.

Provides technical leadership for global semiconductor EDA/CAD compute and design-data-management environments. Owns Perforce Helix and IPLM methodologies, project and workspace configuration, Linux-based engineering infrastructure, automation, legacy-data migration, documentation, training, and expert support. Develops Python and shell utilities, improves CAD workflow scalability, and partners with engineering and IT teams on infrastructure strategy, standardization, and adoption across analog and digital semiconductor design projects.

Provides technical leadership for global semiconductor EDA/CAD compute infrastructure and design-data-management environments. Owns Perforce Helix and IPLM methodologies, project and workspace configuration, Linux engineering environments, automation, legacy data migration, documentation, training, and expert troubleshooting. Partners with CAD, engineering, and IT teams to standardize scalable design workflows across analog and digital semiconductor projects.

Provides technical leadership for global semiconductor engineering compute and CAD environments. Owns Perforce Helix and Methodics IPLM design-data-management methodologies, project and workspace configuration, Linux infrastructure, automation, legacy data migration, documentation, training, and escalation support. Develops Python and shell utilities, standardizes EDA workflows, supports Cadence environments, and collaborates with engineering and IT teams to create scalable, reliable infrastructure for analog and digital semiconductor design.

Senior technical contributor developing and supporting power management solutions for data center and AI servers. Responsibilities include debugging and validating digital multiphase products at customer sites, solving complex customer issues, supporting marketing and product development, validating controllers and power stages, creating datasheets and application notes, and training application and field application engineers. Requires deep power electronics expertise, experience with firmware-enabled products and Intel, AMD, or SoC systems, laboratory testing, and automation.

Leads hands-on design and integration of analog and power IP for PMIC products, including regulators, converters, control loops, and complex analog blocks. Drives layout guidance, simulation, extraction, verification, technical trade-offs, and silicon bring-up. Establishes design methodologies and quality processes while collaborating with cross-functional teams to deliver high-performance power solutions from concept through production.

Lead block-level and full-chip verification for digital content in power, analog, and mixed-signal ICs. Develop SystemVerilog/UVM environments, verification plans, coverage models, assertions, regressions, and formal checks. Verify resets, clocks, power states, faults, interfaces, DFT, scan, ATPG, gate-level behavior, and analog-digital interactions. Own debug and sign-off, resolve specification gaps, support silicon bring-up, establish methodologies, and mentor engineers.

Leads semiconductor test engineering activities, including silicon characterization, design verification, correlation, production qualification, technical issue resolution, and test coverage improvement. Manages milestones, costs, schedules, yield optimization, test cost reduction, and operational excellence initiatives. Provides technical guidance and mentorship while supporting mixed-signal, PMIC, and charger products using automated test equipment, laboratory instruments, statistical analysis tools, PCB design software, scripting languages, and Git.

Owns verification of complex digital blocks and SoC features from planning through coverage closure. Develops reusable SystemVerilog/UVM environments, constrained-random and targeted tests, assertions, scoreboards, checkers, and coverage models. Debugs RTL, testbench, firmware, integration, and regression issues while collaborating across architecture, design, firmware, analog, validation, and systems teams. Automates regression and reporting workflows and provides technical guidance to junior engineers.

Leads the end-to-end business for an AWS or NVIDIA custom AI power business unit, owning strategy, product roadmaps, portfolio decisions, revenue and margin outcomes, customer relationships, pricing, and execution. Directs cross-functional product management, program management, and marketing teams while partnering with engineering, manufacturing, sales, and finance. Personally oversees a key product from new product introduction through volume ramp and builds organizational capability as the business scales.

Leads Renesas’s global web content strategy, governance, operations, taxonomy, information architecture, and discoverability across websites and digital ecosystems. Manages a multidisciplinary team, establishes content standards and intake workflows, guides SEO, onsite search, and AI discovery initiatives, and develops measurement frameworks to improve content quality, engagement, and business impact. Partners with marketing, product, engineering, web, analytics, and executive stakeholders to align priorities and optimize content across product, technical, marketing, blog, video, partner, search, and AI-powered channels.

Design and integrate low-power digital RTL for mixed-signal semiconductor products from architecture through mass production. Responsibilities include Verilog/SystemVerilog design, simulation, synthesis, timing analysis, lint, CDC/RDC, UPF, DFT, verification support, analog collaboration, layout coordination, silicon evaluation, documentation, and debug. The role requires close collaboration across analog, verification, physical design, and broader product teams.