Jobs at Renesas Electronics

Leads regional go-to-market strategy, demand creation, design-win growth, customer engagement, pricing, partner development, sales enablement, competitive intelligence, and product roadmap feedback for semiconductor MCU, MPU, and connectivity portfolios. Translates technical capabilities into customer value propositions, manages regional opportunities and distribution relationships, identifies market whitespace, and aligns global product strategy with local customer and market requirements.

Leads next-generation low-voltage GaN motor-control IC definition, architecture, and roadmap strategy. Translates system requirements into silicon specifications, collaborates with design and R&D teams, develops and validates high-power prototypes and evaluation boards, performs circuit simulations and system tradeoff analyses, and supports strategic customer engagements. Requires expertise in power electronics, motor-drive systems, semiconductor architecture, PCB layout, protection mechanisms, lab characterization, and GaN power-device technology.

Own strategic automotive accounts and drive revenue growth through opportunity discovery, design-ins, design wins, RFQ and quotation management, pricing negotiations, forecasting, and account strategy. Build relationships with executive and engineering stakeholders, collaborate with global cross-functional teams and ODMs, and support customer product development from qualification through production launch. Some travel is required.

Develop, test, document, and maintain embedded software for deeply embedded platforms. Collaborate with software architects, follow SDK roadmaps, ensure software quality, verify deliverables, plan tasks, report progress, and mentor junior engineers. The role requires C programming, ARM-based processor experience, software testing, source control, Agile methodologies, and use of electronic test equipment. Experience with Zephyr RTOS, Bluetooth Low Energy, open source, multithreaded RTOS, and cryptography is advantageous.

Lead pre- and post-silicon RF and analog analysis, characterization, chip bring-up, laboratory testing, debugging, and performance optimization. Define evaluation methods, test correlations, automation tools, and data-collection processes for circuit blocks and systems. Analyze statistical results, document findings, establish datasheet parameters, and support design teams in resolving complex silicon issues.

Owns pre- and post-silicon RF and analog circuit analysis, characterization, testing, bring-up, debugging, and performance optimization. Defines evaluation methods, test correlations, automation, data collection, and datasheet parameters. Supports circuit design teams in resolving complex silicon issues and documents block- and system-level results. Requires RF/analog chip design experience, Cadence Virtuoso proficiency, laboratory testing expertise, and strong technical communication.

Design, implement, operate, and troubleshoot secure, scalable AWS network infrastructure across multi-account and multi-region environments. Responsibilities include configuring VPCs, Transit Gateway, Direct Connect, VPNs, load balancing, firewalls, WAF, and hybrid connectivity; automating provisioning with Terraform or CloudFormation; monitoring performance and security; resolving complex network issues; and maintaining documentation and operational standards.

Partners with global HRBPs and Operations leaders to execute talent, performance, organizational design, workforce planning, leadership development, and change initiatives. Uses people analytics to guide data-driven decisions, supports organizational transitions, and collaborates across regions and HR functions in a global matrixed environment.

Develop and maintain UVM-based verification environments for complex IP and SoC designs. Create testbenches, test cases, coverage models, verification plans, and scenarios; run regressions, analyze coverage, debug RTL issues, and perform root-cause analysis. Collaborate with architecture, design, firmware, and external teams while contributing to verification automation and methodology improvements. The role may mentor junior engineers, participate in reviews, and support project schedules and quality standards.

Drives semiconductor product testing, yield enhancement, cost reduction, and device quality across the product lifecycle. Reviews low-yield lots, leads root-cause analysis and corrective actions, sustains production improvements, validates new products, migrates tester platforms, supports system integration, and collaborates with test engineering, assembly, quality, factories, and OSAT partners.

Drives semiconductor product yield improvement, test-cost reduction, quality, and manufacturability. Reviews low-yield lots, leads root-cause analysis and corrective actions, supports sustaining production activities, qualifies new products, migrates tester platforms, and coordinates with test engineering, assembly, quality, factories, and OSAT partners.

Drives semiconductor product yield improvement, test cost reduction, quality, and manufacturability across the product lifecycle. Reviews low-yield lots, leads root-cause analysis and corrective actions, sustains production activities, qualifies new products, supports tester platform migrations, integrates systems, and collaborates with test engineering, assembly, quality, factories, and outsourced semiconductor assembly and test providers.

Provides senior-level technical support and escalation management for complex Altium product issues in enterprise engineering environments. Responsibilities include root cause analysis, troubleshooting PCB design workflows, PLM and enterprise integrations, authentication systems, and cloud services; coordinating with R&D and product teams; documenting solutions; creating technical content; testing pre-release features; and mentoring support engineers. Requires deep expertise in PCB design or related domains, enterprise technologies, and Altium solutions.

Designs and verifies complex mixed-signal multilayer PCBs, manages external manufacturing and assembly, and supports component library development. Performs optical and electrical hardware verification using ATE systems, creates probe card analyzer recipes and board checker programs, and maintains hardware boards and sockets. Coordinates layout reviews, supplier quality corrective actions, KPIs, project schedules, technical issue escalation, and hardware shipments across international, cross-functional teams.

Designs and verifies complex mixed-signal, multilayer PCB layouts from schematics. Manages external PCB manufacturing and assembly, including quotes and purchasing. Coordinates layout reviews, supports component library development, and verifies technical drawings for test equipment compatibility. Tracks project schedules, escalates technical issues, and manages supplier quality concerns, corrective actions, and KPIs while collaborating with international cross-functional teams and vendors.

Provides Level 2 onsite and remote IT support for end-user computing, including installations, troubleshooting, equipment setup, asset management, documentation, basic infrastructure maintenance, and new-office setup. Acts as a liaison between IT and business teams, supports users and IT projects, and provides technical guidance and training. Requires extensive enterprise IT support experience, Windows and Microsoft Office expertise, asset management knowledge, and basic networking skills.

Lead end-to-end design verification for complex SoC IPs and subsystems, defining verification strategies, developing reusable UVM environments, and driving functional, code, assertion, and cross-coverage closure. Build checkers, scoreboards, monitors, and assertions; apply constrained-random, directed, AI/ML-assisted, formal, low-power, and gate-level verification techniques. Collaborate with architecture, RTL, emulation, and SoC teams, support debugging, evaluate EDA tools, ensure sign-off quality, and mentor junior engineers.

Leads regional solution marketing for embedded semiconductor products, including market analysis, solution planning, MRD/SRD development, go-to-market strategy, partner collaboration, launch readiness, training, and field execution. The role develops value propositions, coordinates cross-functional solution development, engages customers and distributors, tracks funnel impact, and serves as the regional subject matter expert across industrial, energy, HVAC, security, data center, and AI server markets.

Conduct semiconductor device and package reliability qualification testing, including environmental and mechanical stress tests and component analysis such as solderability, X-ray inspection, wire pull, ball shear, and die shear. Operate and maintain laboratory equipment, manage reliability databases, preserve data integrity, follow safety and operating procedures, and support products from development through high-volume manufacturing.

Owns block- and full-chip static timing analysis, constraint development, timing signoff, violation debugging, and ECO-based timing closure across all modes, corners, and design stages. Partners with Synthesis, CTS, Physical Design, and RTL teams to resolve setup, hold, clock, signal integrity, and variation-related issues through tapeout. Generates timing reports, supports convergence reviews, and communicates closure status to stakeholders.