FPGA Lead Designer

Responsibility

• Design, Implement and support Bring-up of FPGA solutions for Image Sensor Test/Development/Reference systems Hardware
• Develop FPGA solutions by considering hardware/software cross domain challenges/issues
• Implement Test environment and Hardware Debug of Test/Development/Reference Systems
• Implement FPGA verification environment and support by creating models, test scripts and tool setup
• Own and Design module/system level test benches to verify functionality
• Integrate 3rd party VIP into System Level verification environment
• Should have Strong Digital Design Concepts, RTL coding and FPGA Implementation skills.

#LI-RG1

Responsibility

• Design, Implement and support Bring-up of FPGA solutions for Image Sensor Test/Development/Reference systems Hardware
• Develop FPGA solutions by considering hardware/software cross domain challenges/issues
• Implement Test environment and Hardware Debug of Test/Development/Reference Systems
• Implement FPGA verification environment and support by creating models, test scripts and tool setup
• Own and Design module/system level test benches to verify functionality
• Integrate 3rd party VIP into System Level verification environment
• Should have Strong Digital Design Concepts, RTL coding and FPGA Implementation skills.

#LI-RG1

Education & Experience

• Bachelor's/Masters in Electronics Engineering with 12+ years of relevant experience 
• Experience with Xilinx/Altera FPGAs and hands on with Verilog/VHDL, C/C++, Python and tools usage like Vivado/Quartus tools, Cadence IES/Questa/VCS is a plus
• Strong troubleshooting and analytical skills using lab equipment including oscilloscopes, logic analyzers and chipscope/signal tap are strongly preferred
• Desired Domain knowledge of AXI, PCIe, USB, DP, HDMI, I2C, DDR, fundamentals of Image processing. Understanding of MIPI is an advantage.

Additional Skills

• Understanding of low level software (firmware and/or drivers in C or C++)
• Should have good knowledge of Analog and digital electronics
• Hands-on experience with Constrained Random test-bench using High Level Verification Languages (SystemVerilog preferred)
• Experience in verification environment development using UVM/OVM//VMM
• Assertion based verification techniques, Skilled in FPGA verification
• Scripting: Perl, Python, UNIX shell, Makefile.
• Coding Languages: Verilog, System Verilog  
• Good communication skills (verbal and written)
• Self-motivated team player with excellent problem solving skills  
• Strong logic Design and verification background

#LI-RG1