Jobs at onsemi

Leads onsemi’s global Test, Technology, and Operations Engineering organization across multiple international sites. Owns strategy and execution for DFT, test automation, ATE and reliability hardware, NPI readiness, cost reduction, factory transfers, quality, EFAR closure, and sustaining support. Builds technical capability, drives operational discipline and continuous improvement, and partners cross-functionally to improve test coverage, yield, product quality, execution efficiency, and cost performance.

Leads analog IC design teams developing power management products from product definition through manufacturing release. Responsibilities include architecture and circuit design, IP development, verification, silicon evaluation, layout oversight, test planning, customer engagement, production transfer, project scheduling, and technical mentorship. The role also owns complex SoC-level outcomes and supports hiring, personnel development, and collaboration with global engineering teams.

Design and deliver analog power-management IP blocks from specification through verification and silicon validation. Responsibilities include circuit design, simulation, reliability and PVT analysis, layout guidance, technical reviews, debugging silicon issues, and collaboration with validation, product, test, and layout engineering teams. The role covers regulators, gate drivers, control loops, and complex mixed-signal designs while ensuring alignment with full-chip schedules.

Leads development of power management analog and mixed-signal ICs from architecture and IP definition through verification, silicon evaluation, tapeout, and production transfer. Provides technical leadership, mentors junior engineers, resolves complex analog and silicon issues, guides layout and verification, manages schedules and resources, and collaborates with systems, applications, marketing, validation, product, and test engineering teams.

Monitors channel program compliance across distributors and partners, reviews transactions and incentive programs, analyzes data for anomalies and policy violations, investigates findings, tracks corrective actions, and supports compliance policies, controls, documentation, and automation improvements.

Lead site Environmental Health and Safety programs for a manufacturing facility. Responsibilities include regulatory compliance, incident root-cause analysis, corrective actions, EHS metrics, audit readiness, ISO 14001 and ISO 45001 certification support, training, permits, reporting, sustainability initiatives, continuous improvement, and regulatory agency interactions.

Onsite engineering interns will work on semiconductor product development, testing, characterization, data analysis, software and automation, AI applications, manufacturing optimization, reliability, process improvement, and validation. Interns collaborate with engineering and cross-functional teams, document technical findings, present project outcomes, and gain mentorship and professional development. Opportunities span applications, product, test, design, device, manufacturing, quality, software, data, AI/ML, technical marketing, and process engineering.

Onsemi seeks non-engineering interns to support business operations, analytics, finance, supply chain, IT, HR, marketing, and other functions. Interns will analyze data, improve processes, develop reports and dashboards, assist with planning and operational initiatives, conduct research, and present recommendations. The role is fully on-site in Scottsdale, San Jose, or Allen and includes mentorship, professional development, and cross-functional collaboration.

Non-engineering interns support business operations, supply chain, finance, procurement, IT, analytics, HR, marketing, and other functions. Responsibilities may include data analysis, dashboard and report creation, process improvement, financial planning, auditing, research, and strategic project support. Interns collaborate with cross-functional stakeholders, use AI and digital tools, present findings, and participate in professional development. This is an on-site role in Scottsdale, San Jose, or Allen.

Engineering interns support semiconductor product development, testing, characterization, manufacturing optimization, reliability, process improvement, software tools, data analytics, and AI-enabled engineering applications. Interns collaborate with cross-functional teams, analyze technical data, conduct experiments, document findings, and present project outcomes. Opportunities span applications, product, test, design, device, manufacturing, quality, software, data, AI and machine learning, technical marketing, and process engineering.

Leads advanced semiconductor package development from architecture through production release. Responsibilities include substrate design, flip-chip and passive component integration, electrical, thermal, and mechanical optimization, reliability qualification, root cause analysis, DFM, yield improvement, cost reduction, NPI, and high-volume manufacturing transfer. The role coordinates with product engineering, silicon design, reliability, operations, OSATs, suppliers, and customers.

Leads development of ReRAM and emerging embedded memory technologies from bitcell architecture and process integration through silicon characterization, reliability qualification, and reusable memory IP enablement. Defines technology requirements, plans DOE and test-chip activities, analyzes memory performance and failure mechanisms, develops models and design rules, supports IP release, and drives cross-functional technical reviews. Mentors engineers and communicates technical risks and tradeoffs to design, manufacturing, product, quality, and leadership teams.

Leads new product, package, and technology introductions into semiconductor manufacturing. Responsibilities include process transfer, production setup and validation, ramp-up, risk mitigation, BOM and process-flow definition, manufacturability analysis, troubleshooting, root-cause investigations, material and equipment selection, and yield, cost, stability, and quality improvements. The role uses DOE, SIPOC, Lean Six Sigma, and engineering data-analysis tools while coordinating cross-functional manufacturing teams.

Develop image-processing algorithms constrained by technology, power, and area requirements. Create physics-based and data-driven solutions, validate them through regression testing and image databases, and perform calibration and tuning. Build supporting tools, collaborate with image-quality engineering and applications teams to resolve algorithm issues, and manage related development projects.

Lead analog and mixed-signal physical layout for image sensor blocks, including floorplanning, routing, matching, shielding, power planning, verification, and tapeout signoff. Collaborate with circuit designers, identify risks, optimize performance and area, mentor junior engineers, improve layout methodologies, and support automation and execution across product generations.

Develops reusable analog and mixed-signal CMOS circuit blocks, including amplifiers, LDOs, bandgaps, and charge pumps. Responsibilities include circuit design, layout supervision, simulation, verification, laboratory debugging, bench characterization, post-silicon validation, DFT collaboration, documentation, and production release. Provides technical leadership in specifications, project planning, design-team coordination, and collaboration with systems, test, product, applications, and marketing teams.

Supports industrial power conversion products by defining semiconductor requirements, validating electrical performance through simulation and experiments, and designing test circuits and systems. Performs application verification for silicon and SiC devices, develops technical collateral and intellectual property, and provides technical presentations and training to sales, field application engineers, partners, and customers. Requires strong knowledge of power electronics, semiconductor devices, motor drives, diagnostics, and problem-solving.

Leads subcontractor quality engineering for semiconductor external manufacturing, including qualification, APQP phase-gate reviews, audits, failure analysis, corrective actions, quality metrics, and continuous improvement. Partners with subcontractors, customers, and global internal teams during NPI, production, transfers, and process changes. Provides technical guidance on WLCSP, plating, bumping, and quality systems while supporting customer audits and subcontractor training.

Leads semiconductor package development from concept through production release, focusing on flip-chip substrate and leadframe technologies. Responsibilities include package architecture, material selection, assembly process optimization, reliability qualification, root-cause analysis, yield improvement, cost reduction, supplier and OSAT collaboration, and technology transfer to high-volume manufacturing.

Leads employee relations, workplace investigations, disciplinary processes, labor compliance, engagement initiatives, recognition programs, internal communications, employee events, volunteer activities, and culture-building programs. Provides guidance on performance, conduct, and conflict resolution while tracking engagement metrics and preparing reports. Coordinates vendors, communications, onboarding support, and community initiatives to improve employee experience, inclusion, belonging, and organizational culture.