Jobs at onsemi

Designs and verifies semiconductor hardware using Verilog HDL, golden-model verification, logic synthesis, and formal verification. The role covers both front-end logic design and back-end implementation. A bachelor’s degree or higher in semiconductor, electrical, or electronic engineering is required. Experience with image sensors, C++, Python, and strong English communication skills are preferred.

Support site financials including CapEx and manufacturing spend control, cost analysis/modeling, capacity expansion and ROI scenario planning. Assist monthly close, P&L forecasting, variance analysis, annual and long-range planning, and quarterly reviews. Collaborate with operations to drive efficiencies and cost reduction. Role requires up to 20% travel and a flexible work schedule.

Manage technology development projects in semiconductor manufacturing. Responsibilities include scheduling, risk management, documentation, and communication with stakeholders to ensure project success.

Leads finance for onsemi’s Power Solutions Group, serving as strategic advisor to executives and owning the financial narrative, P&L performance, forecasting, capital allocation, investment governance, and resource planning. Partners across product, sales, operations, supply chain, engineering, and corporate finance to shape strategy and improve execution. Establishes strong controls and reporting integrity while advancing AI, automation, and analytics across finance operations.

Build and deploy scalable AI and machine learning solutions across business functions, from ideation through production. Lead architecture, MLOps, RAG, prompt engineering, model optimization, integrations, monitoring, observability, and responsible AI governance. Partner with infrastructure, security, data engineering, and business teams while mentoring junior engineers and driving enterprise AI adoption on Azure.

Supports employee and industrial relations activities, including disciplinary processes, investigations, grievances, conflict resolution, employee engagement, compliance audits, labor-law adherence, and HR documentation. The role maintains confidential employee records, coordinates ER/IR onboarding and offboarding activities, prepares workforce reports, supports union and government-agency interactions, and helps implement HR policies, ethics initiatives, and compliance programs.

The Analyst will manage distribution inventory, analyze bookings, enhance processes, and partner cross-functionally to drive growth across Ecommerce Distributors.

Supports the Oracle platform team across EBS, Fusion, OCI, WMS, and OTM. Responsibilities include reporting, data analysis, code migrations, BI Publisher report development, AI-assisted productivity improvements, Python scripting, automation, testing, troubleshooting, and documentation of platform enhancements.

Manages Saw, Die, and Wire Bond process engineering while driving quality, capability, efficiency, and continuous improvement. Supports PFMEA, control plans, SPC, inspection methods, corrective actions, new technology introduction, and manufacturing-process improvements. Coordinates Lean Six Sigma initiatives, production continuity plans, and compliance activities. Develops and supports engineering personnel, promotes technical knowledge sharing, and ensures adherence to environmental, health, safety, labor, ethics, regulatory, and internal-control requirements.

Provides technical ownership for semiconductor device performance during manufacturing ramp-up. Responsibilities include daily lot disposition, yield monitoring and analysis, excursion containment, continuous yield improvement, cost reduction, device release coordination, and executing design of experiments across wafer fabrication, probe, assembly, and final test.

Supervises assembly test production activities for an assigned shift, including scheduling, workflow management, employee hiring, training, coaching, and performance evaluation. Ensures production targets, SOP adherence, equipment operation, safety requirements, and OSHA/EPA compliance. Maintains records and progress reports, resolves personnel and process issues, coordinates with planners, buyers, engineering, and management, and drives continuous process improvement.

Develops and optimizes semiconductor assembly processes including wafer dicing, chip packaging, bonding, molding, BGA packaging, and final testing. Troubleshoots defects, improves yield and quality using SPC and failure analysis, conducts DOE experiments, evaluates materials and tooling, supports new package launches, and creates SOPs and material specifications. Collaborates with technicians, test engineers, and R&D teams while leading and motivating team members.

Supervise manufacturing specialists and daily material production operations to achieve targets. Lead teams, manage performance, training, safety, quality, inventory, housekeeping, and equipment maintenance. Investigate production issues and coordinate containment with quality assurance and engineering teams. Drive continuous improvement focused on process simplification, labor productivity, cost efficiency, and compliance with company policies, regulations, FMEA, control plans, RBA, SOX, and EHS standards.

Provides technical support for semiconductor package development and optimization. Participates in cross-functional projects, conducts design risk assessments, develops mitigation plans, evaluates package designs for performance and cost, creates package roadmaps, maintains DFMEA and design documentation, prepares lead-frame and tooling drawings, and manages BOM-related documents. The role also requires understanding GMPs, packaging integrity analysis, and professional communication in English.

Leads a global IT internal audit team and manages technology and cybersecurity audit lifecycles, risk assessments, control testing, remediation, and executive reporting. Modernizes audit delivery through AI, automation, analytics, and continuous monitoring. Advises IT and business leaders on technology risk, cybersecurity, AI governance, data governance, third-party risk, disaster recovery, and Oracle Cloud controls while presenting findings to executives and the Audit Committee.

Lead architecture, RTL development, and design automation for a configurable IO subsystem for microcontroller/SoC platforms. Define specs, implement parameterized and Python generator-based flows, develop SystemVerilog RTL and UVM testbenches, support synthesis/STA/timing closure, collaborate cross-functionally, and apply AI/ML to improve productivity and verification.

Leads digital architecture, RTL design, low-power design, synthesis, timing analysis, and tool-flow execution for power-management ICs. Drives designs from architecture through RTL, verification, implementation, system-level bring-up, and post-silicon validation. Collaborates with analog, digital, verification, architecture, and project-management teams globally while improving design processes, reuse, and quality. Applies expertise in ASIC and mixed-signal development, digital control peripherals, power-converter architectures, and power-performance-area trade-offs.

Develop and execute ASIC verification plans, build SystemVerilog OVM/UVM testbenches, implement reusable VIP, and achieve code and functional coverage closure. Apply constraint-random verification, assertions, object-oriented programming, and ASIC verification methodologies. Collaborate with internal teams, external customers, and VIP providers while addressing complex semiconductor design challenges. Low-power UPF and formal verification experience are advantageous.

Leads early product development for SiC power MOSFET technologies, including process integration, engineering lots, DOE, yield and defect analysis, TCAD simulation, cost reduction, and production issue resolution. The role optimizes device performance, reliability, and manufacturing yield through process and design improvements, correlates electrical and process data, supports layout and test structure reviews, enables technology ramp-up, collaborates cross-functionally, and mentors junior engineers.

Leads development of complex power management analog and mixed-signal ICs, from architecture and IP definition through verification, tapeout, silicon evaluation, and manufacturing release. Provides technical leadership, resolves complex analog and silicon issues, guides layout and verification teams, manages schedules and resources, collaborates across systems, applications, validation, product engineering, and test, and mentors junior engineers.