Jobs at onsemi

Leads a global IT internal audit team and manages technology and cybersecurity audit lifecycles, risk assessments, control testing, remediation, and executive reporting. Modernizes audit delivery through AI, automation, analytics, and continuous monitoring. Advises IT and business leaders on technology risk, cybersecurity, AI governance, data governance, third-party risk, disaster recovery, and Oracle Cloud controls while presenting findings to executives and the Audit Committee.

Lead architecture, RTL development, and design automation for a configurable IO subsystem for microcontroller/SoC platforms. Define specs, implement parameterized and Python generator-based flows, develop SystemVerilog RTL and UVM testbenches, support synthesis/STA/timing closure, collaborate cross-functionally, and apply AI/ML to improve productivity and verification.

Leads digital architecture, RTL design, low-power design, synthesis, timing analysis, and tool-flow execution for power-management ICs. Drives designs from architecture through RTL, verification, implementation, system-level bring-up, and post-silicon validation. Collaborates with analog, digital, verification, architecture, and project-management teams globally while improving design processes, reuse, and quality. Applies expertise in ASIC and mixed-signal development, digital control peripherals, power-converter architectures, and power-performance-area trade-offs.

Develop and execute ASIC verification plans, build SystemVerilog OVM/UVM testbenches, implement reusable VIP, and achieve code and functional coverage closure. Apply constraint-random verification, assertions, object-oriented programming, and ASIC verification methodologies. Collaborate with internal teams, external customers, and VIP providers while addressing complex semiconductor design challenges. Low-power UPF and formal verification experience are advantageous.

Leads early product development for SiC power MOSFET technologies, including process integration, engineering lots, DOE, yield and defect analysis, TCAD simulation, cost reduction, and production issue resolution. The role optimizes device performance, reliability, and manufacturing yield through process and design improvements, correlates electrical and process data, supports layout and test structure reviews, enables technology ramp-up, collaborates cross-functionally, and mentors junior engineers.

Leads development of complex power management analog and mixed-signal ICs, from architecture and IP definition through verification, tapeout, silicon evaluation, and manufacturing release. Provides technical leadership, resolves complex analog and silicon issues, guides layout and verification teams, manages schedules and resources, collaborates across systems, applications, validation, product engineering, and test, and mentors junior engineers.

Lead digital design architecture and end-to-end IP or SoC development for power management products. Own RTL implementation, low-power design, synthesis, timing analysis, physical-design interfaces, and front-end tool-flow deployment using RTL2GDS methodologies. Collaborate with analog, digital verification, architecture, project management, and global engineering teams. The role requires leadership in complex ASIC and mixed-signal chip development, platform-based design, microprocessor interconnect integration, and successful IC product releases.

Supports employee and industrial relations activities, including disciplinary processes, investigations, grievances, conflict resolution, employee engagement, compliance audits, labor-law adherence, and HR documentation. The role maintains confidential employee records, coordinates ER/IR onboarding and offboarding activities, prepares workforce reports, supports union and government-agency interactions, and helps implement HR policies, ethics initiatives, and compliance programs.

Supports customer experience initiatives through survey and feedback platform management, customer journey projects, data analysis, governance materials, communications, sprint planning, process documentation, and user acceptance testing. Collaborates with cross-functional teams, attends meetings, contributes to brainstorming, and shadows CX leaders and analysts. The internship requires strong communication and organizational skills, Microsoft Office familiarity, interest in customer experience and human-centered design, and enrollment in a relevant degree program.

Coordinates critical and expedited shipments across factories, supply chain, customer service, distribution centers, and freight partners. Analyzes shipment urgency, determines optimal shipping methods, approves expedited requests, monitors deliveries end to end, develops customer recovery plans, and coordinates urgent semiconductor device shipments across regional command centers.

Design and deliver complex analog and mixed-signal power-management IPs, including regulators, converters, gate drivers, and control loops. Lead analog blocks from definition through tape-out, perform design and simulation, guide physical designers, collaborate with validation and test teams, debug silicon issues, and ensure technical execution aligns with full-chip schedules.

Leads digital architecture, RTL design, low-power implementation, synthesis, timing analysis, and verification support for power management ASICs and mixed-signal ICs. Drives designs from architecture through RTL, pre-silicon bring-up, implementation, and post-silicon validation. Collaborates with analog, digital verification, architects, and project teams across global locations while improving design tools, flows, reuse, and quality processes.

Provides HR operational support across recruitment, candidate coordination, interview scheduling, job postings, onboarding, employee data maintenance, reporting, and process improvement. Partners with hiring managers, Talent Acquisition, HR Business Partners, IT, Facilities, Payroll, and shared services teams to ensure efficient hiring and new-hire integration. Requires strong organization, communication, confidentiality, Microsoft Office proficiency, business-level English, and fluent Korean.

Supports three senior leaders through calendar management, travel coordination, expense reporting, communications, meeting preparation, document handling, and administrative follow-up. Serves as the Scottsdale site administrator, managing office operations, visitors, logistics, onboarding support, and employee engagement activities. Handles confidential information, legal signature processing, project tracking, and executive support while coordinating with IT, Facilities, HR, Finance, and Security.

Leads and develops a standard cell library engineering team in Brno. Responsibilities include setting priorities, coordinating projects, ensuring high-quality and timely delivery, guiding circuit design, layout, characterization, modeling, verification, and automation, and improving engineering workflows. The manager also supports recruiting, mentoring, career development, stakeholder communication, and technical project execution across global teams.

Leads digital architecture, RTL implementation, low-power design, synthesis, timing analysis, and verification flows for power management ICs. Collaborates globally with analog, digital, verification, and project teams; supports pre-silicon platforms, post-silicon validation, IP quality control, and system-level feature bring-up. The role requires expertise in ASIC and mixed-signal development, power converter architectures, digital control peripherals, and power-performance-area trade-offs.

Design and deliver analog power-management IP blocks from definition through tape-out. Responsibilities include CMOS analog design, block-level simulation, technical reviews, layout guidance, silicon validation, debugging, and collaboration with product, test, validation, and physical design teams. The role covers regulators, converters, control loops, mixed-signal designs, gate drivers, and other power-management circuits while coordinating execution with full-chip schedules.

Leads product-level engineering for Si, SiC, and GaN power discrete devices used in automotive and industrial applications. Owns technical requirements, process technology evaluation, system modeling, cost and risk analysis, package modeling, design validation, FMEA, qualification, and design reviews. Coordinates cross-functional global teams, resolves technical issues, drives engineering milestones, presents decisions to stakeholders, and supports transition to high-volume manufacturing while ensuring performance, reliability, cost, yield, quality, and schedule targets.

Operate production equipment and ensure quality and efficiency in semiconductor manufacturing through understanding specifications, complying with standards, and supporting production goals.

Leads analog IP development for power management ICs from definition through tape-out, silicon evaluation, validation, and production transfer. Guides physical design and verification teams, collaborates globally, resolves complex silicon issues, and owns technical outcomes across analog and mixed-signal designs. The role also requires planning schedules and resources, tracking execution, and mentoring or attracting engineering talent.