At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration.
We value humility and believe in direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together, we can help shape the endless possibilities of AI.
Design Engineer :
ESSENTIAL DUTIES AND RESPONSIBILITIES:
Responsible for the micro-architecture and design of the AI Control sub-system modules including Hardware Execution Engines.
Own design, document, execute and deliver fully verified, high performance, area, and power efficient RTL to achieve the design targets and specifications
Design of micro-architecture and RTL, synthesis, logic and timing verification using leading edge CAD tools and semiconductor process technologies
Design and Implement logic functions that enable efficient test and debug
Participate in silicon bring-up and validation for blocks owned
REQUIREMENTS:
Bachelor’s degree in electrical engineering, Computer Engineering or Computer Science with 5 years of meaningful work experience
Experience in micro-architecture and RTL development (Verilog/System Verilog), focused on Processor and sub-system design, Digital Signal Processing blocks is a plus
Exposure to Computer Architecture & Arithmetic is required. Experience with RISC-V/Tensilica/ARM/Mips processors is required
Exposure to Computer Architecture & Arithmetic is required. Experience with Floating point and Integer Arithmetic and Numerics is a plus. Exposure to Interconnect and Bus Interfaces is required.
Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis
Strong interpersonal skills and an excellent teammate
Equal Opportunity Employment Policy
d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We’re committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day.
d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.
Skills Required
- Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science with 5 years of meaningful work experience
- Micro-architecture and RTL development experience (Verilog/SystemVerilog), focused on processor and sub-system design
- Experience with RISC-V, Tensilica, ARM, or MIPS processors
- Exposure to computer architecture and arithmetic
- Experience with floating point and integer arithmetic and numerics
- Exposure to interconnect and bus interfaces
- Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis
- Experience with Digital Signal Processing blocks
- Strong interpersonal skills and ability to work effectively on a team
What We Do
d-Matrix is building a new way of doing datacenter AI inferencing using in-memory computing (IMC) techniques with chiplet level scale-out interconnects. Founded in 2019, d-Matrix has attacked the physics of memory-compute integration using innovative circuit techniques, ML tools, software and algorithms; solving the memory-compute integration problem, which is the final frontier in AI compute efficiency.
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