Design Engineer - STA

Posted 10 Days Ago
Be an Early Applicant
Fort Collins, CO, USA
In-Office
129K-207K Annually
Expert/Leader
Software • Semiconductor • Manufacturing
The Role
Designs and supports semiconductor timing solutions using static timing analysis, physical design principles, timing constraints, signal integrity, clock networks, and timing models. Debugs timing-tool errors, generates reports, analyzes setup and hold timing, and works with large datasets. Collaborates independently with geographically distributed engineering teams, manages multiple assignments, communicates findings clearly, and may supervise others. Requires extensive electrical or computer engineering experience and TCL programming.
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Job Description:

Job Complexity

Works on significant and unique development and support issues where analysis of situations or data requires an evaluation of intangibles along with an in-depth understanding of the underlying design/constraints and implementation techniques used. Exercises independent judgment in methods, techniques and evaluation criteria for obtaining results. Creates formal networks involving coordination among groups and works well with individuals and teams spread across geographical time-zones.  

Technical Skills/ background

Strong understanding of VLSI and ASIC physical design

  • Should have basic understanding of PLLs and clock networks

  • Should be familiar with design elements like flip flops, latches, memories, and basic CMOS logic gates

Experience using a static timing analysis tool. Preferably Synopsys PrimeTime and/or Cadence Tempus.  

  • Ability to create and debug timing constraints

  • Ability to understand and debug warning and error messages from the timing tool

  • Ability to generate and understand timing reports

Understanding of basic STA concepts

  • Solid understanding of RC networks and how they affect the timing/propagation of signals

  • Understanding of Signal Integrity, Crosstalk Delay, and Glitch/Noise Analysis

  • Understanding of setup analysis, hold analysis, and other timing checks

  • Ability to understand and create timing diagrams

Preferred understanding of more advanced STA concepts

  • POCV/SOCV/LVF modeling of variation

  • MIS - multi input switching

  • CCS/ECSM/NLDM - liberty timing models

  • PBA - path based analysis

  • LOCV/SOCV - location aware timing derates

Experience on timing SOIC/ 3DIC designs a plus

Experience using SPICE analysis

Coding experience

  •  TCL is required. Experience with at least one or two other coding languages is preferred 

Communication and organizational skills

  • Must have the ability to work and clearly communicate with multiple engineers and teams across geographies

  • Must have the ability to work with and organize large amounts of data

  • Must be able to organize and present data in a clear manner

  • Must be able to manage a large variety of tasks

  • Strong ability to debug problems and create solutions

  • STA requires a person with strong engineering capabilities and good engineering judgement. 

Supervision

  • Acts independently to determine methods and procedures on new or special assignments.

  • May supervise the activities of others.

  • Works in close collaboration with supervisor and can effectively context-switch and multi-task based on business need.

Education and Experience required

  • BS degree in Electrical Engineering or Computer Engineering and 12+ years related experience; or an MS degree in Electrical Engineering or Computer Engineering and 10+ years related experience.

Programming Languages

  • Python/Ruby, TCL, BASH

General

  • Professional, open, and highly self-motivated attitude


Compensation and Benefits


The annual base salary range for this position is USD 129,400.00 To USD 207,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

  • BS degree in Electrical Engineering or Computer Engineering with 12 or more years of related experience
  • MS degree in Electrical Engineering or Computer Engineering with 10 or more years of related experience
  • Strong understanding of VLSI and ASIC physical design
  • Basic understanding of PLLs and clock networks
  • Familiarity with flip-flops, latches, memories, and basic CMOS logic gates
  • Experience using a static timing analysis tool
  • Ability to create and debug timing constraints
  • Ability to interpret timing-tool warnings and errors
  • Ability to generate and understand timing reports
  • Understanding of setup, hold, signal integrity, crosstalk delay, glitch/noise analysis, RC networks, and timing diagrams
  • TCL coding experience
  • Ability to communicate and collaborate with engineers across geographies
  • Ability to organize, analyze, and present large amounts of data
  • Ability to manage multiple tasks and debug problems independently
  • Understanding of POCV, SOCV, LVF, MIS, CCS, ECSM, NLDM, PBA, and location-aware timing derates
  • Experience with Synopsys PrimeTime or Cadence Tempus
  • Experience with timing SOIC or 3DIC designs
  • Experience using SPICE analysis
  • Experience with Python or Ruby
  • Experience with Bash
  • Ability to supervise the activities of others

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

  • Equity Value & Accessibility Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
  • Retirement Support A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
  • Pay Growth & Progression Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.

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The Company
HQ: Palo Alto, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

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