ASIC Physical Design Engineer

Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.

Meet the Team

Acacia, part of Cisco, provides innovative silicon-based high-speed optical interconnect products to accelerate network scalability through advancements in performance, capacity, and cost. Our DSP ASICs, silicon photonic PICs, and coherent modules empower cloud and service providers to meet the fast-growing demand for data. We have assembled a team of cross-functional experts capable of solving the challenges of next-generation optical interconnects, resulting in industry-leading, award-winning products. Come join us at Cisco, named the #1 world’s best workplaces, and do purposeful work that makes a global impact and gives back to a company culture that empowers an inclusive future for all.

Your Impact

As a Physical Design Engineer with Acacia, you will focus on the technical execution of high-performance ASIC designs. Working as an individual contributor, you will lead the RTL-to-GDSII implementation flow for advanced semiconductor nodes, ensuring that Acacia’s networking platforms meet rigorous power, performance, and area (PPA) targets. You will be responsible for the successful delivery of assigned blocks from specification through to tapeout.

• Implement end-to-end RTL-to-GDSII implementation for advanced nodes (sub-7nm to 2nm)

• Perform hierarchical floor planning, place and route, and clock/power distribution

• Conduct static timing analysis (STA) and drive timing closure for multi-mode/multi-corner designs

• Lead the physical design of assigned blocks, ensuring quality and alignment to project timelines

• Develop and maintain automated scripts to improve design flow efficiency and methodology

• Collaborate with RTL and DFT teams to debug and resolve complex physical implementation issues

• Implement test plans and participate in design reviews to ensure robust, high-quality work

• Implement ECO strategies and support sign-off processes

• Contribute to the refinement of design methodologies and best practices within the engineering team

• Document functional specifications and track progress for assigned project landmarks

Minimum Qualifications

• Bachelors degree in Engineering + 5 years of related experience, or Masters degree in Engineering+ 3 years of related experience.

• Demonstrated experience in ASIC physical design and implementation.

• Experience working with hierarchical floor planning, clock and power distribution, global signal and I/O planning along with physical convergence, timing closure, and hierarchical design methodology.

• Prior experience with power integrity analysis and working on designs >100M gates in advanced nodes.

Preferred Qualifications

• Experience with Scripting using languages such as TCL, Perl, Python, etc.

• Place & Route experience using tools such as Cadence Innovus or Synopsys ICC2.

• Experience with formal equivalence check, timing closure, signal integrity, EMIR, physical verification DRC/LVS

• Synthesis experience including Synopsys DC/FC.

• Formal Verification experience using tools such Synopsys Formality or Cadence LEC

• Experience with Static Timing Analysis including tools such as Tempus.

• Experience with block level EMIR closure.

• Physical Verification experience including tools such as Synopsys ICV or Mentor Calibre.

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

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We are Cisco, and our power starts with you. 

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks.  Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

• 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees

• 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco

• Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees

• Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)

• 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next

• Additional paid time away may be requested to deal with critical or emergency issues for family members

• Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

• .75% of incentive target for each 1% of revenue attainment up to 50% of quota;

• 1.5% of incentive target for each 1% of attainment between 50% and 75%;

• 1% of incentive target for each 1% of attainment between 75% and 100%; and

• Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

Non-Metro New York state & Washington state:

* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.

** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.