Jobs at Tenstorrent Inc.

As a Staff Engineer, you will lead the technical efforts in CPU verification, emulation, and debugging, optimizing the emulation infrastructure and workflow for high-performance CPUs, collaborating with teams to ensure fast and effective product development.

Lead architecture, development, customization, and technical oversight for core business applications and integrations (ERP, CRM, SaaS). Drive middleware and iPaaS strategy, design secure scalable APIs and microservices, manage system performance, upgrades, and risk mitigation, and provide hands-on technical leadership across integrations and cloud platforms.

Define and own chiplet-based compute platform architectures for high-performance RISC-V CPUs in SiP solutions. Lead design of PCIe, die-to-die connectivity, coherent fabrics, system management, and confidential computing subsystems. Collaborate with architecture, hardware, software, and external IP partners to deliver production-ready chiplet architectures and drive cross-functional execution.

Provide strategic executive support to senior leaders in a fast-paced technical organization: manage complex calendars, communications, travel and events, and drive cross-functional initiatives to align priorities and execution.

The Munich Site Manager will lead program planning and execution for silicon and platform initiatives, enhancing collaboration and driving technical direction in Munich.

As a Senior Engineer in System-Level Design Verification, you will validate AI silicon's performance, ensuring system connectivity and functionality across large compute platforms, while collaborating with hardware and software teams to achieve silicon targets.

Design and architect chiplets for automotive SoC, focusing on performance and safety requirements while collaborating across engineering teams.

The Staff Technical Program Manager will lead semiconductor physical design projects, managing complex schedules and facilitating communication between teams and clients within AI/ML and CPU initiatives.

As Director of Customer Engineering, manage technical customer relationships, translate needs into engineering specifications, and enhance collaboration between customer teams and internal engineering.

Design and optimize high-performance SoC and IP architectures for AI workloads, focusing on RTL implementation, power, performance, and area optimization.

Design, develop, and optimize GCC and LLVM compilers for RISC-V and AI architectures, collaborating across hardware and software teams to enhance performance.

Design and simulate high-speed interconnects, collaborate with teams on specifications, troubleshoot issues, and support post-silicon bring-up and validation.

The STA Methodology Engineer will lead the optimization of timing methodologies and automation, collaborating across teams to address advanced-node design challenges.

Lead cross-functional product development for AI processors and systems from concept to delivery. Drive schedules, risks, dependencies, and stakeholder alignment across hardware, software, firmware, validation, manufacturing, and suppliers. Communicate technical status to executives and coordinate structured product development processes in a hybrid, collaborative environment.

Design board-level routing studies, mock-ups, and SI/PI modeling to support early-stage semiconductor package and package-board co-design. Collaborate with signal integrity, power integrity, mechanical, and system teams to develop PCB routing environments for BGA optimization, package escape studies, and system-level electrical modeling. Apply engineering judgment to evaluate tradeoffs and improve workflows using automation and data analytics.

Build and operate engineering infrastructure for AI hardware and software: improve observability, automate workflows, maintain CI/CD pipelines, diagnose complex cross-layer issues across hardware, firmware, and distributed systems, and drive reliability and productivity improvements.

Lead a team ensuring reliability and observability of engineering infrastructure for AI hardware/software. Drive root-cause analysis across silicon, firmware, OS, networking and distributed systems; build debugging methodologies, monitoring, automation, and workflows; partner with cross-functional teams; mentor engineers and set technical direction to improve productivity and long-term platform reliability.

Contract HR Project Manager to operationalize People programs (promotions, performance, merit, surveys). Build plans, trackers, timelines, align stakeholders (HR, Comp, Analytics, Payroll, business leaders), track progress, surface risks, and ensure execution of cyclical high-impact work in a fast-moving environment. Hybrid role based in Santa Clara, Austin, or Toronto.

Lead chiplet and chip-top physical implementation for high-performance CPU SoCs in a system-in-package environment, driving design closure and mentor junior engineers.

The role involves driving power analysis and optimization for CPU chiplet designs, including managing power projections, collaborating with multiple teams, and evaluating new optimization techniques.