Tenstorrent Inc.
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As the Executive Assistant to the CCO at Tenstorrent, you will manage the CCO's calendar, coordinate meetings and events, handle communications, arrange travel, maintain confidentiality, and assist with ad hoc projects. You will play a strategic role ensuring the CCO can focus on priority tasks and align with company goals.
The Principal Systems Software Engineer at Tenstorrent will design and develop software components for next generation RISC-V systems, focusing on AI and ML. Responsibilities include optimizing software, collaborating with teams, troubleshooting issues, and maintaining high-quality standards.
In this role, you'll build and nurture client relationships, identify new business opportunities, and leverage your technical background to address client needs. You'll collaborate with teams to implement sales strategies, act as an advisor, and stay updated on industry trends to achieve sales targets.
The In-House Counsel will provide comprehensive legal advice across all functions of Tenstorrent, including drafting and negotiating contracts, ensuring compliance with laws, and minimizing legal risks. This role requires adaptability in a fast-paced startup environment and the ability to manage competing priorities effectively.
The Staff Technical Program Manager will lead cross-functional teams for high-performance AI/ML and CPU design projects. Responsibilities include collaborating with various stakeholders, managing project milestones, maintaining relationships with clients, and overseeing the Physical Design Specification process.
The PCB Design Engineer will design and layout complex PCBs, create schematic drawings and BOMs, collaborate with mechanical engineers, and troubleshoot design issues. The role emphasizes proficiency in high-speed PCB design and requires excellent communication and problem-solving skills.
The Sr Staff Engineer will design and develop the PCIe/IO subsystem for a high-performance CPU SoC, create specifications, implement reusable components, ensure integration and performance optimization, and collaborate with various teams for high-quality delivery.
The RISC-V Program Manager will oversee the development of chip architectures for CPU server and machine learning processors, ensuring project schedules are met and collaborating with cross-functional teams to deliver solutions that meet customer needs.
As a Staff Engineer for RTL Design at Tenstorrent, you will implement digital IPs for CPUs and AI/ML chiplets, focusing on RTL coding in Verilog and microarchitecture of security subsystems. You will collaborate with design and validation teams, improve design performance, and debug across various hierarchies.
The Digital DV Engineer at Tenstorrent will be responsible for the verification of digital IP and SOC logic, using advanced methodologies. Responsibilities include creating test plans, writing testbenches, reviewing verification metrics, and conducting performance and power validation of the products.
The SOC Architect will lead the design and standardization of modular chiplet architectures, develop interconnect protocols, and establish open architecture standards. Responsibilities include overseeing collaborative efforts with industry bodies, optimizing performance and integration, and mentoring engineering teams on chiplet design and verification.
The SOC Physical Design Lead is responsible for managing floor planning and block-level physical implementation for high-performance designs. This includes overseeing SoC integration, directing layout verification, and collaborating with architecture, RTL, and packaging teams while driving methodology and tool enhancements.
The Staff Customer Solutions Engineer role involves engaging with OEM/ODM customers to assist in the design development of data center systems using Tenstorrent products. Responsibilities include addressing customer requirements, leading technical discussions, developing innovative architectures, training partners, and collaborating with various teams to resolve design issues and support customer projects.
The Staff Design Verification Engineer will create verification plans and develop DV environments primarily using System Verilog and UVM methodologies. Responsibilities include executing test plans, performing functional verification at the RTL level, and developing Universal Verification Components. Candidates must have a Bachelor's or Master's degree in relevant fields and experience in DV and verification methodologies.
As a Software Engineer specializing in AI Compilers, you will design, develop, and optimize compilers for advanced semiconductor products, working collaboratively with engineers to enhance performance of machine learning applications and integrate software into leading frameworks.
As an Account Sales Manager, you will build and nurture client relationships, identify new business opportunities, and leverage your technical knowledge to meet client needs while focusing on expanding sales in the Japanese market, specifically for AI servers and PCI cards.
The Sr. IP Product Manager will drive strategy and manage the development of Accelerated Compute IP products, collaborating with engineering, marketing, and sales teams to ensure successful delivery and market penetration. Responsibilities include defining product requirements and go-to-market strategies, conducting market research, and representing the company at industry events.
As a Gate-Level Simulation Engineer, you'll develop methodologies and conduct simulations to verify the performance and functionality of high-performance CPUs. The role involves collaboration with design teams, generating test plans, analyzing results, automating workflows, and maintaining simulation environments.
The Staff Engineer will design and develop emulation infrastructure for high-performance AI/ML engines. Responsibilities include building emulation components, improving emulation performance, and creating deployment flows for multiple software teams. This role requires a strong technical background and ownership in ensuring successful product delivery.
The CPU Core Feature Verification and Debug Engineer at Tenstorrent is responsible for ISA and micro-architectural verification. The role involves functional verification, testplan development, stimulus creation, regression debugging, and ensuring high-quality delivery of CPU core/cluster.