As a Senior Software Engineer at Tenstorrent, you will develop AI compiler technologies, optimize computational graphs, and enhance MLIR frameworks to connect AI models with hardware.

The SoC Physical Design Verification Engineer leads full-chip signoff, ensuring high-quality silicon through physical verification and debugging across teams for successful tapeouts.

The Sr. Staff HR Business Partner will guide senior leaders in aligning talent strategies, drive complex people projects, and enhance organizational health.

The role involves block-level verification of Cache and Coherence units, leading development of UVM environments, performing RTL verification, and collaborating with cross-functional teams.

Lead and validate high-performance out-of-order RISC-V CPU designs, manage a team of verification engineers, and collaborate with architects.

The role involves designing and optimizing performance-critical kernels for AI hardware, debugging low-level issues, and collaborating with cross-functional teams.

Design and optimize high-performance SoC and IP architectures for AI workloads, focusing on RTL implementation, power, performance, and area optimization.

Design and validate high-speed interconnects for AI systems, defining requirements and performing reliability testing for copper and optical technologies.

The STA Methodology Engineer will lead the optimization of timing methodologies and automation, collaborating across teams to address advanced-node design challenges.

The Munich Site Manager will lead program planning and execution for silicon and platform initiatives, enhancing collaboration and driving technical direction in Munich.

As a C++ Machine Learning Engineer, you will optimize ML training frameworks, debug model performance, and collaborate with various teams to enhance model implementation.

Join the CPU design team to define and implement CPU system RTL, collaborating with multiple teams to deliver a functional and optimized design.

Lead the System IP development and manage the India engineering site, ensuring the execution of technical roadmaps and operational success.

The role involves full-custom layout of mixed-signal ICs, focusing on performance and integration into SoCs using advanced FinFET processes.

As a Senior Engineer in System-Level Design Verification, you will validate AI silicon's performance, ensuring system connectivity and functionality across large compute platforms, while collaborating with hardware and software teams to achieve silicon targets.

The Lead Hardware Solutions Architect will manage RTL modifications, collaborate with silicon engineers, align customer requests with system architecture, and mentor junior engineers.

As Director of Customer Engineering, manage technical customer relationships, translate needs into engineering specifications, and enhance collaboration between customer teams and internal engineering.

The role focuses on leading the technical strategy and architecture for core business applications like ERP and CRM, ensuring scalable and secure integrations. Responsibilities include ownership of development, middleware architecture, API design, and long-term system health management.

Design and architect chiplets for automotive SoC, focusing on performance and safety requirements while collaborating across engineering teams.

Design, develop, and optimize GCC and LLVM compilers for RISC-V and AI architectures, collaborating across hardware and software teams to enhance performance.