Jobs at SK hynix

Lead design and execution of PCIe/NVMe enterprise SSD test plans, triage failures, coordinate with SOC/FW/HW teams, perform gap analysis, support customers, and improve product reliability through system-level testing and debugging.

Process accounts payable invoices, manage employee expense reports via Concur, coordinate expense details with other teams, and support ongoing finance/admin team projects.

Develop and execute comprehensive firmware verification plans for SSDs, design automated white/grey/black-box tests in Python, run end-to-end testing across simulation, FPGA, and prototype hardware, analyze regression failures, root-cause firmware bugs, collaborate on code reviews, and own test reporting and issue resolution.

Develop and deploy AI agents and agentic workflows to automate test execution and scheduling. Implement MCP integrations, build Ansible playbooks, maintain test environments and lab equipment, run automation, triage failures, and report results.

The Staff Engineer will design high-speed interfaces for NVME or Chiplet storage subsystems, oversee multi-functional team efforts, and mentor engineers for silicon success.

Design RTL (Verilog/SystemVerilog) for SoC/IP used in high-performance SSD controllers. Collaborate with verification, silicon validation, and firmware teams. Drive micro-architecture, timing closure, and tapeout readiness while documenting designs and ensuring implementation quality.

Intern will help design and deploy on-prem AI infrastructure (GPU clusters, model serving), use AI-assisted IDEs, develop software and storage test tools (C++, JavaScript, Python), and assist with cryptographic key and certificate lifecycle management while researching security standards and best practices.

Design, implement, and integrate Flash Interface Layer firmware for SSDs. Debug on FPGA/ASIC, develop NAND management algorithms and device drivers, and collaborate with SoC, hardware, and validation teams to deliver production-quality embedded firmware.

Design and implement firmware for FTL, SSD products; perform code reviews, debugging, and collaborate for issue resolution.

Support ASIC physical design for SSD controller chips by executing floorplanning, placement, CTS, routing, and STA. Run DRC/LVS and IR-drop checks, optimize PPA, develop P&R and verification flows, collaborate with front-end teams, and maintain design scripts and documentation.

Lead validation and system-level testing for enterprise PCIe NVMe SSDs. Manage test progress, debug system issues with SOC/FW/HW teams, analyze bugs, use bus analyzers and trace tools, and provide customer-facing technical support to ensure product reliability and compliance.

Design, deploy, and maintain on-prem AI infrastructure and agentic systems. Build GPU clusters, model serving, vector DB-backed RAG pipelines, fine-tune and deploy models, implement governance (MCP), and automate CI/CD and monitoring to integrate AI capabilities into enterprise workflows.

Lead ASIC digital implementation for SoC tapeouts, focusing on DFT, ATPG/ATE integration, synthesis, timing closure, power/IR analysis, multi-power-domain UPF implementation, and flow automation. Collaborate with RTL and PNR teams, troubleshoot synthesis/timing/DFT issues, and maintain signoff scripts, IP DK, and documentation to meet tapeout milestones.

Six-month, full-time onsite internship supporting an ASIC project: manage design databases, code RTL in Verilog/SystemVerilog, run and debug simulations with Synopsys VCS, and collaborate with designers and verification engineers to resolve issues.

Lead design and execution of test plans for PCIe and NVMe eSSDs, manage testing progress, collaborate with teams to resolve issues, and enhance product quality.

The Sr. Principal FTL Engineer will design and implement Flash Translation Layer for SSDs, perform firmware evaluations, and conduct debugging and integration.

The Program Manager will oversee enterprise SSD development by coordinating with various teams, managing schedules, and providing project updates while ensuring smooth communication between teams.

The role involves designing and automating test plans for enterprise SSDs and server storage systems while collaborating with development teams to resolve defects and ensure product quality.

Design, develop, and automate test plans for SSD products, ensure product quality, and collaborate with teams for reliable solutions during the development cycle.

Design, implement, and debug Flash Translation Layer (FTL) and real-time embedded firmware for SSD products. Perform firmware code reviews, integration, performance profiling, validation, failure analysis, and corrective actions in collaboration with stakeholders. Contribute to system-level debugging and optimization for multi-core ARM-based controllers.