About the Company:
At SK hynix memory solutions, we're at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a global leader in NAND flash technology and memory solutions, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies. Our cutting-edge memory technologies are essential in today's most advanced electronic devices and IT infrastructure, enabling enhanced performance and user experiences across the digital landscape.
We're looking for innovative minds to join our mission of shaping the future of technology. At SK hynix memory solutions, you will be part of a team that's pioneering breakthrough memory solutions while maintaining a strong commitment to sustainability. We're not just adapting to technological change – we're driving it, with significant investments in artificial intelligence, machine learning, and eco-friendly solutions and operational practices. As we continue to expand our market presence and push the boundaries of what's possible in semiconductor technology, we invite you to be part of our journey to creating the next generation of memory solutions that will define the future of computing.
About the Role
Join our Physical Design(SoC Integration) team responsible for delivering high-performance SoC designs from RTL to GDS. As a Sr. Staff Physical Design Engineer, you will lead physical implementation efforts for advanced-node designs, driving critical blocks through synthesis, placement, CTS, routing, and signoff. You will work closely with front-end, DFT, power, and analog teams to optimize PPA (Power, Performance, Area) while ensuring silicon success. This role requires deep hands-on expertise across the full physical design flow as well as leadership to mentor junior engineers and define methodologies for the team.
Responsibilities
- Lead physical design implementation from synthesis through GDS for high-performance blocks or full-chip SoC designs in advanced process nodes (7nm, 5nm, 3nm)
- Execute and optimize synthesis, placement, clock tree synthesis (CTS), and routing using industry-standard P&R tools (Synopsys ICC2/Fusion Compiler or Cadence Innovus)
- Drive timing closure and signoff using PrimeTime (PT), including advanced analysis such as SI, AOCV/POCV, crosstalk, and ECO implementation
- Perform RC extraction using StarRC or Quantus and ensure strong correlation between extraction and STA results
- Own physical verification signoff with Mentor/Siemens Calibre, resolving DRC, LVS, ERC, and antenna violations in complex FinFET layouts
- Conduct power integrity analysis using Ansys RedHawk(Redhawk-SC), including static/dynamic IR drop and EM analysis; implement power grid and decap optimizations
- Develop and maintain physical design flows and automation scripts (Tcl, Perl, Python), mentor junior engineers, and collaborate with cross-functional teams to achieve tapeout schedules
Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field (Master's preferred)
- 8+ years of hands-on experience in ASIC physical design with proven tapeout success
- Expert-level proficiency in synthesis, placement, CTS, and routing using Synopsys or Cadence P&R tools
- Deep knowledge of static timing analysis (STA) and PrimeTime signoff, including multi-corner/multi-mode closure
- Demonstrated experience with physical verification using Calibre (DRC, LVS, ERC) and IR drop/EM analysis using RedHawk
Preferred Qualifications
- Experience at 5nm or 3nm process nodes with FinFET and multi-patterning design rules
- Familiarity with low-power design techniques including UPF, clock gating, multi-Vt, and voltage islands
- Strong programming skills in Tcl, Perl, and Python for flow automation and data analysis
- Knowledge of ECO implementation and clock reconstruction (CRPR, useful skew) methodologies
- Experience leading or mentoring a team of physical design engineers on complex SoC projects
- Exposure to memory-centric interfaces and systems such as SSD SoC, HBM, or HBF (High Bandwidth Flash) base die designs (a plus, not required)
- Familiarity with chiplet and die-to-die (D2D) interconnect technologies, including Universal Chiplet Interconnect Express (UCIe) or equivalent D2D PHY protocols (a plus, not required)
COMPENSATION: $160,000/yr - $220,000/yr
REGARDING COMPENSATION:
SK hynix memory solutions America Inc. offers you the opportunity to apply your skills to exciting projects while working with innovative teams. Our compensation package is complimented by a generous benefits package including medical, dental, vision, life insurance and a company 401(k) match, as well as cafeteria, onsite gym and much more. If you are motivated by technical challenges, we offer a collaborative work environment that encourages career growth.
The salary offered to a selected candidate will be tailored based on several factors, including the location, job grade, relevant knowledge, skills, and experience. We also take into account the internal equity among our current team members to ensure fairness and competitiveness.
Skills Required
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
- 8+ years of hands-on ASIC physical design experience with proven tapeout success
- Expert proficiency in synthesis, placement, clock tree synthesis, and routing using Synopsys or Cadence tools
- Deep knowledge of static timing analysis and PrimeTime signoff, including multi-corner/multi-mode closure
- Experience with physical verification using Calibre, including DRC, LVS, and ERC
- Experience with IR drop and electromigration analysis using RedHawk
- Master's degree
- Experience with 5nm or 3nm FinFET process nodes and multi-patterning design rules
- Knowledge of low-power design techniques, including UPF, clock gating, multi-Vt, and voltage islands
- Strong programming skills in Tcl, Perl, and Python for flow automation and data analysis
- Knowledge of ECO implementation and clock reconstruction methodologies, including CRPR and useful skew
- Experience leading or mentoring physical design engineers on complex SoC projects
- Exposure to memory-centric interfaces and systems such as SSD SoC, HBM, or HBF base die designs
- Familiarity with chiplet and die-to-die interconnect technologies, including UCIe or equivalent protocols
SK hynix Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about SK hynix and has not been reviewed or approved by SK hynix.
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Strong & Reliable Incentives — Profit-sharing linked to operating results and the removal of a bonus cap in Korea have produced very large payouts and materially boosted total compensation there. Reporting indicates these incentives have been especially favorable during the AI/HBM upcycle.
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Healthcare Strength — Company materials highlight medical expense support and robust health coverage, and U.S. packages commonly include comprehensive medical, dental, and vision plans. This strengthens the appeal of core benefits alongside cash compensation.
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Parental & Family Support — Programs in Korea include fertility support, extended childcare leave, and education grants for children through university. These family-forward policies expand benefits value beyond salary and bonuses.
SK hynix Insights
What We Do
Semiconductors are essential to all IT products, and its performance often determines the performance of the final products. SK hynix is a global leader in producing semiconductor, such as DRAM, NAND Flash and CMOS Image Sensors. With these technology driven semiconductor products, SK hynix has consistently led the industry and is now the second largest memory chip maker worldwide. IT devices become more pervasive as new imaginative and innovative IT products continue to grab imagination and desires of consumers. SK hynix has enhanced its competency with the best level of technology and a wide range of business portfolios in order to satisfy all those demand from customers. As a member of SK Group*, SK hynix is aiming at becoming the world’s best semiconductor company. SK hynix America Inc. operates as a subsidiary of SK Hynix Inc. *SK Group is one of South Korea's top five industrial conglomerates. It has about 40 affiliated companies, ranging from energy, telecommunications, finance, to construction.
