Teams at SK hynix

Conduct research in SoC design automation, AI-assisted hardware/software co-design loops, and AI infrastructure. Build and evaluate automated flows using simulators, software builds, ASIC or FPGA CAD, and AI agents. Measure power, speed, area, correctness, workload performance, search costs, and reproducibility. Study memory-device behavior, system bottlenecks, compute-memory architectures, and their effects on AI quality, latency, throughput, and energy. Own research questions, methods, and written results.

Develops signal and power integrity solutions for next-generation SSD controller packages, substrates, and PCBs. Responsibilities include high-speed interface simulation, PCB stack-up and routing guidance, design reviews, lab validation, simulation-measurement correlation, debugging, root-cause analysis, customer escalations, documentation, and mentoring engineers. The role collaborates with SoC, firmware, package, and circuit design teams to ensure system-level requirements are met.

Lead end-to-end physical design implementation for advanced-node SoC designs from synthesis through GDS and tapeout. Responsibilities include placement, CTS, routing, timing closure, RC extraction, physical verification, IR drop and electromigration analysis, power-grid optimization, and flow automation. The role requires collaboration with cross-functional design teams, development of physical design methodologies, and mentoring junior engineers.