Jobs at Sandisk Corporation

Owns end-to-end MRO category management for semiconductor manufacturing, including sourcing strategies, RFQs, supplier selection, contracts, cost optimization, risk mitigation, supply continuity, escalations, and supplier performance. Partners with engineering, operations, maintenance, planning, finance, quality, and legal teams to maintain equipment uptime and business continuity. Requires procurement experience, sourcing tools expertise, analytical ability, negotiation skills, and supplier management capabilities.

Leads verification strategy and execution for complex IP, subsystem, and SoC designs. Develops UVM-based environments, reusable verification components, assertions, test plans, coverage models, automation scripts, and regression processes. Performs debug and root-cause analysis, collaborates with architects, RTL designers, and post-silicon teams, drives verification sign-off, mentors junior engineers, and improves methodologies. The role also supports formal verification, AI/ML automation initiatives, and NAND flash memory design verification.

Provides design engineering support for NAND flash memory customer failures, conducting root cause and failure case analysis. Recommends screening, stress, and Design for Testability improvements based on failure analysis findings. Supports logic and analog design verification using Verilog, Verdi, Hspice, and Finesim. Collaborates with product development and customer-facing failure analysis teams while managing multiple technical priorities.

Leads JV and Japan manufacturing operations finance, including financial planning, manufacturing cost analysis, capital expenditure governance, fixed assets, treasury support, METI subsidy compliance, audits, internal controls, and process improvement. Serves as the primary finance liaison with JV partners and cross-functional stakeholders while managing and developing three Senior Analysts. Requires extensive finance experience, strong business partnering and governance skills, and native Japanese with business-level English.

Leads IO design engineering teams developing next-generation VLSI and semiconductor IP from concept through silicon productization. Oversees IO roadmaps, design execution, power optimization, EDA tools, project budgets, timelines, and resource allocation. Collaborates with business units, manufacturing, quality, product engineering, and cross-geographic stakeholders while driving innovation, technical strategy, and production-quality design outcomes.

Own and sustain semiconductor burn-in manufacturing processes, monitor yield and quality trends, investigate failures and deviations, and lead root cause analysis and corrective actions. Drive continuous improvement, production issue disposition, new product qualification, process documentation, audit readiness, and compliance with ESD and quality standards. Collaborate with product, NPI, assembly, manufacturing, and QA teams while providing technical coaching and support.

Develop and deploy production-grade AI/ML, generative AI, and multi-agent systems for supply chain forecasting, planning, optimization, and decision automation. Build scalable Python and AWS ML pipelines, implement MLOps practices, and integrate autonomous workflows with enterprise systems. Collaborate with planning, procurement, manufacturing, IT, and engineering teams; lead agentic AI innovation and scale prototypes into enterprise solutions. The role requires strong expertise in LLMs, agent frameworks, cloud ML engineering, and supply chain planning.

Leads verification strategy and execution for complex IP blocks, subsystems, and SoC designs. Develops UVM-based environments, reusable verification components, functional coverage plans, assertions, automation tools, and regression workflows. Performs debugging and root-cause analysis, collaborates with architects, RTL designers, and post-silicon teams, and drives verification closure and sign-off. Mentors junior engineers, leads technical initiatives, and improves verification methodologies.

Develop and maintain VLSI CAD environments, automation workflows, methodology scripts, Virtuoso and Customer Compiler utilities, and SKILL-based PCells. Support PDKs, Calibre DRC and ICV LVS runsets, layout data management, CAD infrastructure troubleshooting, and EDA vendor collaboration. Partner with design and layout teams to improve semiconductor design efficiency and meet project schedules.

Perform failure analysis on NAND-based products by evaluating electrical, mechanical, analog, and digital performance across hardware, firmware, software, and system interactions. Analyze failure reports, identify root causes, recommend corrective actions, and develop improved analysis methods, procedures, processes, and equipment. Manage laboratory activities, collaborate with NAND, firmware, systems, and ASIC engineering teams, and provide technical leadership.

Analyze logistics data, KPIs, inventory, demand forecasts, supplier performance, and transportation operations to identify inefficiencies and reduce costs. Develop dashboards and management reports, conduct cost-benefit analyses, support LMS and ERP implementations, resolve logistics issues, and collaborate with warehouse, transportation, and procurement teams on continuous improvement initiatives.

Designs and evaluates chip architecture and core, analog, and data-path circuits for high-performance 3D NAND flash memory. Conducts HSPICE, PRIMESIM, and Verilog simulations, performs silicon evaluation, and works on power integrity, signal integrity, and chip floorplanning. Troubleshoots complex problems, evaluates process technologies, collaborates effectively across teams, and delivers results in a fast-paced environment.

Lead cross-functional development, qualification, and mass-production ramp of 3D NAND OEM products for data center applications. Align customer requirements with engineering capabilities, manage technical schedules and dependencies, evaluate engineering results, resolve memory issues, coordinate readiness reviews, and communicate product specifications, roadmaps, recommendations, and risks to internal teams and customers.

Lead digital NAND Flash memory design projects spanning microarchitecture, Verilog RTL design, verification, synthesis, DFT, timing analysis, integration, and closure. Deliver designs meeting power, performance, and area targets; support post-silicon evaluation, debugging, and productization; collaborate with internal and external teams; and mentor junior engineers.

Owns payroll tax governance and compliance across the Americas, with primary responsibility for U.S. federal, state, and local taxes. Leads Workday Payroll and ADP Smart Compliance activities, filings, reconciliations, notices, registrations, equity compensation taxation, audits, controls, risk mitigation, and regulatory updates. Provides technical direction and cross-functional leadership while supporting payroll transformations, acquisitions, legal entity changes, and international payroll tax oversight.

Leads global logistics strategy and a distributed international team overseeing freight forwarders, customs brokers, and 3PL providers. Responsibilities include vendor governance, SLA and KPI management, freight procurement and contract negotiation, customs and trade compliance, transportation risk mitigation, carrier allocation, freight bill auditing, and cross-functional leadership across AMER, EMEA, and APAC.

Own supplier quality and reliability for passive and standard IC electrical components. Lead supplier evaluations, audits, process assessments, readiness programs, failure investigations, 8D corrective actions, CAPA validation, KPI tracking, and qualification activities. Collaborate with design, manufacturing, procurement, quality, reliability, and program management teams to resolve component issues, improve supplier processes, ensure compliance, and support new product development. Travel to supplier locations as needed.

Own supplier quality and reliability for ASIC, SoC, and MUX electrical components. Lead supplier audits, readiness programs, process assessments, failure investigations, 8D corrective actions, CAPA validation, change qualification, KPI development, and business reviews. Collaborate with design, manufacturing, procurement, reliability, and program teams to resolve component issues, improve supplier processes, ensure standards compliance, and support new product development. Travel to supplier locations as needed.

Provides technical leadership for ASIC verification and emulation frameworks, including requirements definition, programming, scripting, regression development, and testbench configuration. Partners with ASIC, design, validation, firmware, and physical design teams to optimize workflows, standardize methodologies, debug simulation and emulation environments, and resolve system-level issues. Requires advanced SystemVerilog UVM, coverage-driven verification, test planning, and Python, Perl, TCL, Bash, and Linux scripting expertise.

Develops and qualifies NAND flash memory devices by defining, automating, executing, and analyzing reliability tests. Collaborates with systems, device, product development, design, technology, and manufacturing teams to support memory qualification and BiCS volume production ramp. Investigates complex reliability and performance issues, prepares technical reports and recommendations, and applies semiconductor device physics, fabrication knowledge, software programming, statistical analysis, and data visualization to improve flash memory performance and reliability.