Jobs at NXP Semiconductors

Leads digital architecture, RTL design, verification, integration, synthesis, timing closure, low-power implementation, silicon validation, and production release for automotive and industrial PMICs. Develops control, monitoring, diagnostics, protection, sequencing, and fault-management functions using Verilog/SystemVerilog. Drives verification, quality metrics, requirements traceability, silicon debug, qualification, and production ramp while mentoring engineers and collaborating across multidisciplinary teams.

Leads architecture, transistor-level design, verification, silicon validation, and production readiness for high-performance PLL and clocking circuits in advanced SoCs and mixed-signal products. Responsibilities include optimizing jitter, phase noise, power, reliability, and yield; collaborating across system, digital, layout, validation, and product teams; debugging silicon issues; conducting design reviews; and mentoring engineers.

Designs, verifies, evaluates, and documents digital functions for IPs, subsystems, and integrated circuits. Ensures designs meet specifications, quality, and reliability requirements while contributing to problem-solving across digital and system domains.

Leads enterprise IT resilience, disaster recovery governance, business continuity alignment, Minimum Viable Company capabilities, cold-start recovery, crisis readiness, and recovery exercises. Establishes recovery standards, validates technology dependencies and objectives, coordinates cross-functional stakeholders, leads restoration during disruptive events, and reports readiness, risks, audit findings, and remediation progress to executive and audit stakeholders. Drives continuous improvement across global technology services.

Optimize semiconductor wafer saw, backgrind, and DBG processes for production. Responsibilities include developing SOPs and operator training, leading root cause analysis for defects and yield losses, dispositioning quality issues, supporting new product introduction and process qualification, analyzing production data, collaborating on cost reduction and improvement projects, and managing process changes and material qualifications.

Leads foundry partnerships and front-end process integration for new technology introduction, product ramp-up, safe launches, manufacturability, and yield improvement. Coordinates NXP technology groups, business lines, customers, and suppliers to qualify and release processes, resolve critical issues, allocate resources, and complete projects on schedule. Serves as the key decision maker for technical, logistical, scheduling, and supplier-related matters.

Manage data center operations, inspect data centers across buildings, and provide Tier 1 application support.

Leads digital transformation projects implementing AI-powered search for NXP.com. Responsibilities include gathering requirements, developing project plans and workflows, evaluating search and AI/ML solutions, coordinating software delivery and testing, managing stakeholders and vendors, supporting deployment, and optimizing search content and performance through KPIs.

Leads the Global Hardware Enablement team and manages NPI/NTI test hardware projects from planning through deployment. Oversees suppliers, sourcing, qualification, schedules, quality, cost, risks, and issue resolution. Coordinates cross-functional stakeholders, ensures compliance with hardware release processes, drives continuous improvement and cost savings, and provides project updates and escalation support.

Implement and verify DFT solutions for complex SoCs, including Scan, MBIST, Boundary Scan, scan insertion, DRC checks, fault coverage analysis, and ATPG pattern development. Create DFT automation scripts, collaborate with design and verification teams, and support silicon bring-up, diagnosis, and yield improvement during production ramp-up.

Designs and develops semiconductor packaging products, structures, and assembly processes. Translates market requirements into package solutions, resolves materials and processing issues, evaluates emerging technologies, and qualifies solutions with internal assembly sites and outsourced semiconductor assembly and test providers. Collaborates with design, materials, modeling, and processing teams, supports manufacturing implementation, and may contribute to patents, technical publications, and international supplier or assembly-site activities.

Supports digital design implementation, logic coding, reviews, debugging, checks, simulations, documentation, and test-result maintenance. Collaborates with verification, physical design, and validation teams throughout project execution while contributing to engineering quality and continuous learning. The role is suitable for a recent or soon-to-graduate engineering or computer science student with foundational problem-solving, testing, documentation, and communication skills.

Supports digital verification by developing test scenarios, running simulations, analyzing results, debugging design issues, maintaining test environments, improving coverage, and documenting findings. Collaborates with design and methodology teams to clarify requirements and resolve issues. The role is intended for a recent or soon-to-be graduate with foundational engineering, testing, problem-solving, communication, and technical documentation skills.

Leads end-to-end ATE test hardware development for wafer sort and final test, including architecture, schematic design, PCB layout, SI/PI analysis, validation, debugging, release, and production support. Partners with engineering, operations, quality, procurement, suppliers, and manufacturing teams to deliver high-performance hardware. Establishes design methodologies, manages technical risks and initiatives, mentors engineers, and drives supplier capability and continuous improvement across semiconductor test programs.

Lead pre-silicon verification for digital IP modules and subsystems. Develop verification plans, UVM-based testbenches, test cases, stimulus, assertions, and regression environments. Execute simulations across RTL, power-aware RTL, gate-level, FPGA, and emulation platforms; debug designs, analyze functional and code coverage, and collaborate with hardware, firmware, software, architecture, and systems teams.

Verify Ethernet and networking IP for advanced SoCs used in automotive, industrial, edge, and telecommunications applications. Design and implement UVM verification environments, develop directed and constrained-random tests, debug failures, analyze coverage, and resolve defects with architecture and design teams. The role also involves verification infrastructure, trade-off analysis, documentation, methodology improvement, and execution of complete hardware verification cycles.

Provide global technical leadership across outsourced semiconductor assembly and test sites, driving yield, quality, reliability, productivity, qualification, site transfer, and capacity expansion initiatives. Lead subcontractor assessments, process changes, Safe Launch activities, root-cause investigations, and quality incident resolution. Partner with cross-functional teams on commercialization, supply resilience, and package documentation while advancing AI/ML, Smart Factory, and manufacturing digitalization programs.

Develop ROM firmware and low-level embedded software for microcontrollers, including pre-silicon verification, debugging, security hardening, and compliance with safety and security standards. The role involves requirements analysis, architecture, coding, testing, and collaboration with hardware, validation, and security teams. Candidates should have practical C programming experience, microcontroller knowledge, debugging ability, version-control experience, and strong English communication skills.

Develop Python tools, libraries and algorithms to optimize, deploy, profile, and benchmark neural network models for embedded and mobile devices. Contribute to open-source frameworks (PyTorch/ONNX/TensorFlow), collaborate on hardware/software co-development for AI accelerators, explore research and prototypes, and support AI R&D across audio, vision, generative and language models.

Leads ESD protection strategy, architecture, design, validation, and sign-off for analog, mixed-signal, high-voltage, automotive, and industrial semiconductor products. Defines methodologies and roadmaps, investigates failures, collaborates across technology, package, validation, and systems teams, and develops simulation and AI-assisted design methods. Provides technical leadership, mentors engineers, supports customer escalations, and drives innovation through patents, publications, and research partnerships.