Jobs at NXP Semiconductors

Design CMOS SRAM and ROM circuits and periphery to meet compiler performance, power, and area targets. Create and run simulation characterization and testbenches, work with layout and CAD teams, ensure frontend model alignment, and collaborate globally to share methodologies and implement GenAI/EDA efficiencies.

Serve as a technical resource in system safety for industrial applications under IEC 61508. Support internal teams, customers, and external design partners with safety solutions and product certification preparation. Coordinate safety certification activities with third-party partners and facilitate communication across multilingual teams, including Chinese-speaking stakeholders.

Lead RTL synthesis and static timing analysis for complex SoC designs at block, subsystem, and SoC levels. Develop SDC constraints, debug setup and hold violations, perform timing sign-off, create STA methodologies and scripts, and collaborate with design, DFT, physical design, and verification teams. Mentor junior engineers and support delivery of next-generation semiconductor products.

Leads security workstreams across complex IT transformation programs, ensuring solutions meet organizational security requirements, regulations, and standards. Responsibilities include translating requirements into controls, managing risk assessments and audits, coordinating certification programs, collecting evidence, driving remediation, supporting secure AI adoption, and reporting risks and recommendations to senior leadership. The role interfaces with IT, cybersecurity, legal, privacy, business teams, and external partners.

Design, develop, test, debug, and optimize compiler software for NXP neural processing units. Collaborate with hardware and systems teams to improve ML software performance and reliability, support customers, and deploy neural networks on embedded NXP hardware. The role involves compiler technologies, C/C++ and Python development, machine learning models, signal processing, Linux, quality standards, and Agile software practices.

Lead SoC debug, microarchitecture, integration, and design methodology from specification through tape-out and post-silicon support. Sign off RTL, timing constraints, CDC, RDC, and related design quality activities while coordinating with verification, DFT, synthesis, and other cross-functional teams. Develop and document production-quality ASIC designs, debug infrastructure, and architecture solutions using ARM-based processors, CoreSight, bus protocols, and system-level clocking, reset, safety, and security concepts.

Develop on-chip EMC solutions for next-generation semiconductor products through modeling, simulation, characterization, validation, and silicon debugging. Support root-cause analysis, EMC standards compliance, interference mitigation, and product robustness while balancing performance, reliability, area, and cost. Collaborate with international, multidisciplinary teams and contribute to automation, technical investigations, documentation, training, and innovation initiatives.

Leads legal support and regional legal strategy across China and APAC, serving as a bridge between global Legal and regional business leaders. Advises on strategic initiatives and regulatory matters, coordinates cross-jurisdictional legal activities, develops legal talent, improves processes, and supports senior stakeholders in complex, fast-moving environments. The role is based in Shanghai, requires Mandarin and English fluency, and includes regional and international travel 2–4 times annually.

Leads strategic customer programs for European automotive OEMs and Tier 1 suppliers, driving adoption of NXP software-defined vehicle, vehicle compute, networking, and processor solutions from concept through production. Coordinates global engineering, product, quality, sales, and business teams; manages risks, escalations, technical and commercial issues, roadmap alignment, executive reviews, and customer relationships.

Leads new product introduction programs for secure connected-edge semiconductor products. Manages multidisciplinary engineering teams across architecture, IC and software design, security, safety, applications, testing, manufacturing, finance, and documentation. Owns development planning, resourcing, budgets, timelines, metrics, gate reviews, risk management, and cross-functional alignment. Ensures complex hardware and software programs meet technical, financial, and delivery requirements while driving operational excellence and team performance.

Plans and drives development boards through the NPI lifecycle, managing strategy, schedules, budgets, procurement, fabrication, assembly, logistics, certification, issue escalation, and cost reduction. Coordinates engineering, marketing, software, validation, manufacturing, suppliers, and supply chain teams to support silicon development, product launches, software releases, customer samples, and sustaining activities.

Leads physical implementation and top-level layout of complex mixed-signal, analog, power management, and automotive ICs from floorplanning through tape-out. Provides technical leadership, manages layout risks, ensures quality and manufacturability, improves methodologies and automation, drives standardization, collaborates with cross-functional engineering teams, and mentors layout engineers across global R&D organizations.

Lead development of NXP’s CoreRide central compute platform for Software Defined Vehicles. Coordinate hardware, software, reference systems, architecture, integration, and validation teams across product lines and global R&D organizations. Collaborate with product management, marketing, automotive customers, ecosystem partners, OEMs, and Tier-1 suppliers to deliver the minimum viable product and complete end-to-end system solution.

Manages requirements engineering processes, tools, traceability, baselines, access rights, reporting, and project setup across engineering organizations. Ensures compliance with requirements processes, supports reviews and change control, resolves process issues, trains project teams, administers DOORS NG, and drives continuous improvement in tools, templates, metrics, and quality. The role also serves as a requirements management subject matter expert and coordinates with stakeholders across business lines.

The Regional SOC Analyst supports defensive cybersecurity operations across IT, OT, and R&D environments. Responsibilities include threat detection, Tier 3 incident response, vulnerability management, hardening, patching, security controls, SOC process improvement, and regional incident coordination. The role also guides a cybersecurity team, collaborates with engineering and R&D groups, and applies frameworks including NIST, IEC 62443, and MITRE ATT&CK. This is a full-time, onsite position requiring experience with CrowdStrike Falcon, SIEM, EDR, NDR, cloud security, and industrial environments.

Develop and execute functional verification for complex SoC, subsystem, and system-level designs. Responsibilities include verification planning, traceability, UVM testbench and component development, constrained-random stimulus, simulation, coverage analysis, SystemVerilog assertions, regression management, debugging, failure reproduction, and RTL or gate-level root-cause analysis. The role requires experience with multi-clock and power-domain designs, ARM architectures, interconnects, cache coherency, bus protocols, and verification methodologies.

Lead architecture, bring-up, validation, debugging, and customer enablement of NXP-based OpenBMC platforms. Develop Linux BSP and driver enhancements, integrate Redfish, IPMI, MCTP, PLDM, and server management functions, and support interfaces including PCIe, I2C, I3C, SMBus, UART, Ethernet, and GPIO. Collaborate with hardware, software, product, ecosystem partners, and customers on reference solutions, design-ins, technical escalations, documentation, open-source contributions, and production delivery.

Develop and validate OpenBMC solutions on NXP platforms for datacenter and server infrastructure. Responsibilities include hardware and software bring-up, management protocol enablement, platform integration, validation automation, system debugging, customer technical support, reference design development, documentation, and contributions to the OpenBMC ecosystem.

Develop, integrate, and validate OpenBMC solutions on NXP platforms for datacenter and server infrastructure. Perform hardware and software bring-up, implement management protocols, validate server functions, develop automation and regression testing, debug system integration issues, support customers and partners, and create technical documentation. The role also contributes to reference designs, demonstrations, workshops, and upstream OpenBMC initiatives.

Develop and execute verification strategies, plans, testbenches, and environments for complex ASIC and SoC digital designs. Use SystemVerilog, UVM, formal verification, constrained-random testing, assertions, and coverage analysis. Debug design issues, collaborate with architecture and software teams, improve verification methodologies, and mentor junior engineers.