Jobs at MaxLinear

Leads architecture, design, simulation, verification, integration, tapeout, silicon bring-up, characterization, and production of complex RF, analog, data-converter, SerDes, and mixed-signal ICs. Owns critical RFIC blocks, drives top-level sign-off and silicon investigations, collaborates on RF layout and electromagnetic analysis, defines production-test strategies, and mentors engineers while guiding technical decisions and methodology improvements.

Develop and support Ethernet switch and PHY solutions on embedded Linux and RTOS platforms. Customize software packages, modify BSPs, integrate and debug PHY firmware, validate networking functionality, investigate customer issues, and perform interoperability and regression testing. The role also includes platform bring-up, technical documentation, customer support, FAE training, and collaboration with R&D teams to improve firmware quality and product reliability.

Leads system-level integration, validation, and automated test development for embedded semiconductor and high-performance communication platforms. Develops test plans, validates PAM4 DSP data paths and high-speed interfaces, performs hardware and firmware debugging, and drives root-cause analysis. Collaborates with ASIC, RFIC, software, DSP, and systems teams while mentoring engineers and advancing test architecture and coverage.

Own end-to-end semiconductor production and supply planning from wafer fabrication through finished goods delivery. Develop production and demand plans, manage capacity and supplier commitments, optimize inventory, assess supply risks, and lead recovery and continuity actions. Partner with foundries, OSATs, and cross-functional teams to address bottlenecks, improve throughput, reduce cycle time, and support customer demand and business growth.

Supports PON CPE customer projects from development through mass production, including product bring-up, software integration, system validation, interoperability testing, and field issue resolution. Debugs embedded Linux systems using MaxLinear SDK and reference designs, provides technical training, supports evaluations and design-ins, and collaborates with customers, partners, and internal teams on technical and business decisions.

Supports optical product customers and internal teams through design wins, product evaluations, technical training, debugging, validation, and field testing. Develops reference designs, test plans, reports, application notes, datasheets, and user guides. Contributes to product roadmaps and competitive analysis while coordinating PCB and PCBA vendors and delivering evaluation kits. Requires expertise in optical transceivers, high-speed digital and RF hardware, system integration, lab instrumentation, and customer-facing technical support.

Develop emulation and FPGA models from RTL designs using synthesis, partitioning, and routing tools. Integrate hardware and software collateral, debug emulation models, support pre-silicon and post-silicon validation, and improve RTL test execution and platform usability. Create automation scripts and flows for emulation efficiency, collaborate with architects and verification teams, and provide guidance on validation environments, test suites, and methodologies.

Develop and execute digital verification plans for analog mixed-signal products, blocks, and subsystems. Build UVM and SystemVerilog verification components, including scoreboards, agents, sequencers, monitors, assertions, and coverage models. Debug RTL and gate-level simulations, analyze regressions, verify design fixes, convert tests to production patterns, and support ATE vector bring-up. Collaborate with design, systems, validation, and test engineering teams to improve first-silicon success.

Lead the architecture, design, implementation, verification, characterization, and debugging of RF, analog, mixed-signal, and digital IC circuits integrated into SoCs. Collaborate with system and product teams on specifications and circuit trade-offs, analyze non-idealities, test designs in the lab, define production test requirements, and report design and evaluation results.

Leads microarchitecture and RTL design for DSP modules, including filters, modulators, demodulators, and custom blocks. Integrates DSP subsystems into SoC platforms and develops ASIC solutions meeting power, performance, and area targets. Performs design verification using SystemVerilog, UVM, Python, or C, along with synthesis and static timing analysis. Collaborates across disciplines to solve complex digital communications and semiconductor design challenges.

Leads full-chip ASIC physical design for large programs, including implementation strategy, PPA optimization, closure, signoff readiness, and tapeout delivery. Defines physical design flows, methodologies, guidelines, and adoption plans; resolves design and flow issues; drives technology adoption and organization-wide improvements. Collaborates with front-end, layout, EDA, and program teams, represents physical design in program forums, maintains vendor relationships, hires and mentors engineers, and coordinates execution across teams.

Leads architecture, microarchitecture, RTL design, and integration of high-performance packet-processing, interface, and system-control blocks in multi-CPU SoCs. Develops scalable ASIC solutions for optical and wireless communications, applies digital design and verification methodologies, translates requirements into PPA-efficient implementations, and supports block verification, synthesis, static timing analysis, and design automation.

Architects, develops, debugs, tests, and maintains digital SOC design methodologies and EDA flows from RTL through GDS. Creates scripts, qualifies commercial EDA tools, verifies flow signoff, and establishes tool regressions. Collaborates with engineering IT, database, technology, and design teams to optimize compute infrastructure and resolve signoff issues. Leads projects, guides engineers, documents methodologies, trains design teams, supports flow setup, and drives consensus across business units and EDA vendors.

Leads development of communications ICs with advanced signal-processing blocks, assigning work, tracking progress, resolving technical issues, and prioritizing resources. Collaborates with RF, ASIC, software, marketing, and customer-facing teams. Mentors staff engineers, drives methodology improvements, creates training, encourages innovation and patents, and occasionally performs design or debugging work. Requires deep communications-system expertise and extensive experience in modulation, coding, SERDES, beamforming, or related technologies.

Develop and maintain automated test frameworks; perform functional, regression, stress, reliability, and performance testing; validate storage, networking, and accelerator software stacks; conduct kernel-level testing and debugging on Linux/BSD; analyze performance bottlenecks using observability tools; and lead technical validation initiatives with cross-functional teams.

Develops and enhances Voice over IP stacks, telephony DSP and SLIC applications for home gateway platforms. Responsibilities include tuning audio algorithms, debugging software, supporting customer IP integration, building audio-quality monitoring tools, and assisting with deployment, configuration, and QA automation. The role requires expert C programming, Linux kernel and networking experience, SIP/IMS voice signaling and media-processing expertise, real-time communication protocols, and familiarity with telephony standards, packet analysis, and security practices.

Leads end-to-end IC substrate and package layout for complex SoCs and multi-die products, including bump planning, pin assignment, floorplanning, routing, stackup definition, SI/PI optimization, verification, signoff, and manufacturing release. Collaborates with physical design, assembly, reliability, manufacturing, OSAT, and substrate vendors. Designs advanced package architectures and supports tape-out while balancing performance, manufacturability, reliability, and cost. May automate workflows and mentor junior designers.

Leads optical hardware systems applications engineering, including team hiring and mentoring, customer design-in support, technical debugging, product testing, reference designs, documentation, vendor and lab management, and product roadmap support. Partners with sales, FAEs, marketing, and engineering teams to secure design wins, resolve customer issues, validate products, and improve reliability. Requires extensive optical transceiver, analog, RF, high-speed digital, PCB, and hardware/software debugging experience, with up to 30% travel.

Develop, maintain, debug, test, and qualify SoC design methodologies and EDA flows from RTL through GDS. Implement scripting-based workflows, verify flow signoff results, establish tool regressions, and integrate flows with engineering compute infrastructure. Support design engineers by resolving setup issues, documenting methodologies, training teams, and collaborating with IT and database management groups.

Develop and validate analog serial transceiver ICs from specifications through production release. Design blocks including op-amps, comparators, references, bandgaps, charge pumps, high-voltage transmitters and receivers, and capless LDOs. Collaborate on layout, integration, design reviews, verification, reliability, yield, post-silicon debugging, system characterization, and productization support.