Jobs at Lumai

Develop and maintain analog/mixed-signal verification methodology for converter, bias/reference, and clocking IP. Build AMS testbenches, behavioral and real-number models, verification plans, assertions, coverage, and regression infrastructure. Execute functional, PVT corner, and Monte Carlo verification, validate analog/digital interfaces, and support tapeout sign-off. Collaborate with analog designers and digital verification engineers to identify coverage gaps and ensure end-to-end verification of resets, clock domains, and calibration handshakes.

Own the architecture, technical roadmap, design, verification, tapeout, and post-silicon bring-up of analog and mixed-signal IC blocks for a photonic AI accelerator. Lead and mentor a design team, establish methodology, manage foundry and PDK partnerships, and co-design photonic receiver interfaces and calibration systems with cross-functional teams. Communicate technical risks, schedules, and trade-offs to engineering leadership.

Design mixed-signal IC infrastructure for Lumai’s photonic receiver and ASIC platforms, including analog/digital interfaces, bias and reference circuits, PLLs, and clock distribution. Responsibilities include PVT and mismatch simulation, layout collaboration, mixed-signal IP integration, tapeout support, post-silicon characterization, and design reviews. The role requires collaboration across analog, digital, data converter, and physical design teams.

Bring up and characterize new analog and mixed-signal silicon from first power-on through full performance testing. Develop bench test plans, operate laboratory instrumentation, measure converter, PLL, and bias/reference metrics, and correlate silicon results with simulations. Debug performance discrepancies with circuit designers, automate measurements using Python, document findings, support calibration tuning, and help transition bench characterization into production test planning.

Own full-custom analog and mixed-signal layout for advanced CMOS blocks, applying precision matching, parasitic mitigation, floorplanning, and physical verification techniques. Drive DRC, LVS, PEX, ESD, and latch-up sign-off through tapeout, collaborate with circuit designers on back-annotated simulations, support post-silicon debug, and mentor junior engineers.

Lead end-to-end analog and mixed-signal ASIC design for a photonic AI accelerator: architect circuits (TIA, VGA, ADC/DAC, PLLs, LDOs), drive full-custom flow and tapeout sign-off, run silicon bring-up and characterization, define design methodologies, and mentor junior designers while collaborating with photonics, digital, firmware, and foundry partners.

Own and operate end-to-end ML pipelines from research to hardware-validated production. Build experiment tracking, CI/CD, benchmarking, observability, and resource scheduling for on-prem accelerator clusters and cloud. Collaborate with ML researchers, compiler and hardware teams to optimise models, automate testing, and enable reproducible, hardware-in-the-loop deployments.

Design and maintain firmware, drivers, and RTOS-based control software for an AI accelerator. Lead BSP bring-up, implement deterministic RTOS tasks, debug hardware with JTAG/oscilloscope/logic capture, and establish coding standards and testing practices.

Develop and maintain low-level firmware, drivers, and RTOS-based control software for an AI accelerator. Perform BSP bring-up, bootloader configuration, hardware debugging (JTAG/GDB/oscilloscope), write firmware tests and CI, and document interfaces while collaborating with senior engineers and hardware teams.

Integrate and harden the Lumai Iris software stack for data-center deployments, support model onboarding and conversion, work with disaggregated prefill/decode runtimes, troubleshoot software issues in the field, enable and train customer ML and infra teams, and relay field feedback into product and engineering.

Lead technical customer engagements for Lumai's optical compute inference platform: run deep discovery with hyperscalers and labs, map requirements to solutions, scope and run benchmarks/POCs, produce proposals/RFP responses, deliver demos and workshops, and feed customer insights into product and engineering roadmaps.

Lead integration, validation, and performance characterization of Lumai Iris server units; perform system bring-up and on-site troubleshooting in data centres; train operators and act as primary technical contact; feed deployment feedback into product and engineering.

Own technical customer engagements for Lumai's optical compute inference platform: lead deep technical discovery, scope and run benchmarks, design solutions and reference architectures, produce proposals/RFIs/RFPs, deliver demos/workshops, and feed customer requirements into product and engineering roadmaps.

Lead Lumai's North American expansion by building strategic partnerships with hyperscalers, cloud providers, system integrators and data center operators. Drive go-to-market strategy, map ecosystems, represent the company at conferences, feed market insight into product and fundraising, and ultimately build and lead the regional business development team.

Define and own end-to-end AI system architecture linking AI workload requirements to chip microarchitecture and software interfaces. Drive workload-grounded architectural trade-offs, create performance models and specs, coordinate hardware and software teams, track architectural metrics through chip lifecycle, and support benchmarking and post-silicon validation.

Lead and own the AI application software stack architecture for an optical AI accelerator: design SDK and inference runtime, drive framework integration and model optimisation, collaborate with hardware architects, mentor a growing distributed team, hire and deliver production-quality code.