Jobs at Lumai

Support company scaling by managing IT and systems administration, people/HR operations, corporate governance, finance operations, and cross-functional projects (office moves, fundraising, due diligence). Implement and automate workflows, maintain compliance and documentation, and drive operational improvements.

Design, analyse and develop compact optomechanical systems and prototypes. Produce CAD models and engineering drawings, run structural/material/thermal simulations, build and test prototypes, manage projects, document designs and communicate findings with cross-functional teams.

Lead end-to-end analog and mixed-signal ASIC design for a photonic AI accelerator: architect circuits (TIA, VGA, ADC/DAC, PLLs, LDOs), drive full-custom flow and tapeout sign-off, run silicon bring-up and characterization, define design methodologies, and mentor junior designers while collaborating with photonics, digital, firmware, and foundry partners.

Own end-to-end delivery of hardware, firmware, and AI software programmes. Build project plans, risk registers and dependency maps; run programme reviews; coordinate supply chain and vendors; manage risks, resources, and stakeholder alignment; improve engineering operating model and reporting for leadership and investors.

Lead Lumai's North American expansion by building strategic partnerships with hyperscalers, cloud providers, system integrators and data center operators. Drive go-to-market strategy, map ecosystems, represent the company at conferences, feed market insight into product and fundraising, and ultimately build and lead the regional business development team.

Own and operate end-to-end ML pipelines from research to hardware-validated production. Build experiment tracking, CI/CD, benchmarking, observability, and resource scheduling for on-prem accelerator clusters and cloud. Collaborate with ML researchers, compiler and hardware teams to optimise models, automate testing, and enable reproducible, hardware-in-the-loop deployments.

Define and own end-to-end AI system architecture linking AI workload requirements to chip microarchitecture and software interfaces. Drive workload-grounded architectural trade-offs, create performance models and specs, coordinate hardware and software teams, track architectural metrics through chip lifecycle, and support benchmarking and post-silicon validation.

Lead and own the AI application software stack architecture for an optical AI accelerator: design SDK and inference runtime, drive framework integration and model optimisation, collaborate with hardware architects, mentor a growing distributed team, hire and deliver production-quality code.

Design and maintain firmware, drivers, and RTOS-based control software for an AI accelerator. Lead BSP bring-up, implement deterministic RTOS tasks, debug hardware with JTAG/oscilloscope/logic capture, and establish coding standards and testing practices.

Develop and maintain low-level firmware, drivers, and RTOS-based control software for an AI accelerator. Perform BSP bring-up, bootloader configuration, hardware debugging (JTAG/GDB/oscilloscope), write firmware tests and CI, and document interfaces while collaborating with senior engineers and hardware teams.