Ethernovia
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As a Senior ASIC Architect at Ethernovia, you will lead the development of high-performance custom silicon for advanced automotive communication systems. This role involves defining product specifications, coordinating cross-disciplinary engineering teams, and working on cutting-edge technology in the automotive industry.
Responsible for Testing and Validation of Ethernovia’s software, working closely with design and hardware validation teams to design, implement, enhance, and run test cases and plans. Focus on safety-critical automotive domain with adherence to Functional Safety standards.
Lead the physical design team in implementing digital SoC, develop methodologies and automation, work with various engineering teams, and foster a positive work environment.
Responsible for developing GUI visual tools for Ethernovia's engineering team, including software-based GUI for Evaluation platforms and devices. Debug, test, and demonstrate networking devices.
Responsible for developing Embedded Firmware for networking devices at Ethernovia, focusing on safety-critical automotive applications. Involves architecture, design, implementation, testing, and integration of firmware into Ethernovia's SDK. Requires adherence to Functional Safety standards and best development practices.
Lead and build a digital verification team in India for Ethernovia's automotive communication semiconductors and systems. Responsible for all aspects of digital SoC verification, including hiring and team management. Requires technical expertise in ASIC verification and leadership skills.
Lead and build a digital verification team in Canada for advanced automotive communication semiconductors and systems. Responsible for all aspects of digital SoC verification, including hiring and team development. Must have a minimum of 10 years of ASIC verification experience and strong technical leadership skills.
As a Digital Verification Engineer, you will be responsible for all aspects of digital SoC verification. You will work with architects, designers, and SW engineers to plan and execute verification and validation of advanced automotive communication semiconductors and systems. The role requires a minimum of 7 years of ASIC verification experience and proficiency in Verilog, System Verilog, UVM, Python, TCL, and C/C++.
Lead and build a digital design team in India for Ethernovia's automotive communication semiconductors and systems. Responsible for micro-architecture specification, RTL, verification, synthesis, and meeting design goals. Requires hands-on technical contribution, managerial and technical leadership.
Responsible for all aspects of digital SoC verification for advanced automotive communication semiconductors and systems. Collaborate with architects, designers, and SW engineers to plan and execute verification and validation processes.
As a Digital Verification Engineer, you will be responsible for all aspects of digital SoC verification, working with architects, designers, and SW engineers to plan and execute verification of advanced automotive communication semiconductors and systems.
As a Design for Test Engineer at Ethernovia, you will be responsible for all aspects of DFT including requirements, architecture, insertion, analysis, timing constraints, coverage, bring-up, and RDMA root cause. The role requires 7+ years of DFT experience with a strong understanding of design-for-test fundamentals and methodologies.
As a Senior DFT Architect at Ethernovia, responsible for all aspects of DFT including requirements, architecture, insertion, analysis, timing constraints, coverage, bring-up, and RDMA root cause. Must drive solutions meeting automotive test coverage targets, quality, functional safety, and debug capabilities.
As a Senior ASIC Architect at Ethernovia, you will lead the development of advanced custom silicon with a focus on protocols and applications. You will work closely with cross-functional teams to define product specifications and coordinate engineering efforts across disciplines.
Hands-on chip lead responsible for all aspects of the SoC from definition, implementation, tape out, to bring-up. Leads a cross-functional team through development and execution. Requires strong understanding of digital design fundamentals and methodologies.