Jobs at Eridu AI

Develop board-mounted power solutions for data center technologies, including voltage regulation, power conversion, distribution, DC-DC converters, AC-DC modules, and power management circuits. Model performance using circuit simulation tools, collaborate on PCB layout, minimize EMI and noise, select components with suppliers, and create test procedures validating efficiency, transient response, ripple, noise, and thermal performance.

Leads hardware engineering for Eridu’s AI data center infrastructure solutions spanning silicon, packaging, and systems. The posting provides no specific responsibilities, minimum qualifications, preferred qualifications, technologies, travel requirements, or clearance requirements. The manager will help advance high-performance infrastructure products intended to improve AI data center communication, GPU utilization, cost efficiency, power consumption, and reliability.

Designs and delivers high-speed hardware systems and sub-assemblies from concept through production. Responsibilities include hardware specifications, prototype and supplier evaluation, signal and power integrity analysis, schematic and layout reviews, ODM collaboration, hardware bring-up, qualification testing, EMI/EMC and safety validation, and root-cause corrective actions. The role requires system-level development experience in server, computer, or networking products and close collaboration with contract manufacturers.

Design mechanical systems for rack-mounted computing hardware, including chassis, structural frames, board mounts, card cages, power supply mounts, cable management, and thermal integration. Lead DFM and DFA, create manufacturing-ready CAD models and drawings, review ODM designs and tolerance analyses, manage costs, support prototype and validation builds, and contribute through production ramp while tracking program milestones.

Define and implement design-for-test architecture for multi-chip SoCs, including scan, BIST, memory repair, boundary scan, OCC, LBIST, and ATPG. Develop synthesis constraints, supervise ATPG generation, and achieve high scan and at-speed scan coverage. Perform RTL and gate-level simulation using DFT and synthesis tools while collaborating on low-power, high-performance designs for advanced 7nm-or-below technologies.

Develop and integrate OCP SAI with SONiC, enhance control plane stack, ensure optimal SDK performance, and create automated test tools.

Design and develop Linux-based BSP for hardware platforms, focusing on secure boot, hardware initialization, and integration with platform services. Collaborate across teams to optimize performance and support production readiness.

Develop SDK bridging hardware and software for networking. Ensure performance of switch ASICs with a focus on L2/L3 protocols and embedded systems.

Design and deliver system-level hardware from concept to production for high-speed optical and electrical I/O systems. Define hardware specifications, architect designs, develop de-risk plans, collaborate with partners on schematic/layout, create test plans (EDVT/MDVT/EMI), and validate prototypes in lab.

Lead the QA strategy for Network SDK, design test frameworks, mentor engineers, validate core SDK layers, and ensure high-quality releases.

Lead the design and development of SDK for Eridu's switch ASICs, ensuring performance and production readiness. Oversee software interfaces for dataplane operations and mentor junior engineers.

Lead the development and integration of OCP SAI with SONiC, requiring expertise in programming, SDK development, and networking protocols.

Develop verification infrastructure, perform ASIC verification, execute simulations, analyze coverage metrics, and ensure quality assurance processes.

The Hardware Engineer will design, validate, and deliver systems and sub-assemblies for AI infrastructure, collaborating across multiple teams to ensure effective product development.

The RTL Engineer will collaborate on the design and productization of Ethernet devices, perform RTL coding, debugging, and post-silicon validation with a focus on networking ICs.

The role involves validating Linux BSPs for stability and performance, developing test plans, automating tests, collaborating with teams, and ensuring quality for next-gen networking products.

Lead the design and validation of mechanical systems for high-performance computing hardware, focusing on innovation in packaging, cooling, and manufacturability.

The ASIC Architect will translate system requirements into detailed architecture, guide modeling and feasibility analysis, and collaborate for seamless design implementation across teams for Eridu's networking products.

The role involves post-silicon bring-up, debugging, and validation of ASICs, focusing on diagnostic infrastructures and automation frameworks.

The Technical Leader for Network SDK QA will manage the quality and reliability of the platform software, defining QA strategy, designing test frameworks, and mentoring QA engineers. Responsibilities include leading testing processes, collaborating cross-functionally, and driving automation coverage.