Jobs at Eridu AI

Own optical test and measurement system development for advanced optical communication products. Build and automate the optical lab, design experiments, characterize optical and electro-optical systems, analyze measurement data, and guide system design decisions. Drive OSAT and ODM partners through design reviews, qualification testing, and prototype-to-production transition while meeting quality, cost, and schedule goals. Develop MATLAB or Python tools for experiment control, automation, data analysis, and sim-to-measurement correlation.

Own optical test and measurement system development for advanced optical communication systems. Build and automate the optical lab, design experiments, characterize optical and electro-optical systems, analyze measurement data, and guide system design decisions. Drive OSAT and ODM partners through design reviews, testing, qualification, and production transition. Develop MATLAB and Python tools for experiment control, data analysis, scan automation, and sim-to-measurement correlation while meeting quality, cost, and schedule goals.

Leads embedded software and firmware development for high-speed SerDes PHYs supporting Ethernet, PCIe, and UCIe interfaces. Responsibilities include PHY initialization, link training, equalization, calibration, diagnostics, characterization, production testing, health monitoring, and failure analysis. The role spans pre- and post-silicon bring-up, laboratory validation, system-level signal integrity, and optimization across operating conditions. It also defines reusable software architecture, creates technical documentation, mentors engineers, and serves as the technical authority for SerDes software and system bring-up.

Designs reliable board-mounted power solutions for AI data center technologies, including voltage regulation, power conversion, distribution, and power management circuits. Responsibilities include circuit simulation, PCB layout collaboration, EMI and noise reduction, component selection, and supplier coordination. Develops and executes validation testing for efficiency, transient response, ripple, noise, and thermal performance. Troubleshoots BMP systems and supports power design throughout the product lifecycle.

Lead product marketing for AI data center networking solutions. Define positioning, messaging, value propositions, competitive intelligence, thought leadership, content, product launches, and sales enablement. Collaborate with product management, engineering, sales, and marketing to translate complex technical capabilities into differentiated customer outcomes for hyperscalers, neoclouds, and other large service providers.

Leads hardware engineering for Eridu’s AI data center infrastructure solutions spanning silicon, packaging, and systems. The posting provides no specific responsibilities, minimum qualifications, preferred qualifications, technologies, travel requirements, or clearance requirements. The manager will help advance high-performance infrastructure products intended to improve AI data center communication, GPU utilization, cost efficiency, power consumption, and reliability.

This listing collects unsolicited applications into a talent pool for future openings at Eridu AI. Candidates submit their information; the company will contact applicants if a role matches their skills and interests.

The Physical Design Engineer will manage SOC physical assembly, design methodologies, and collaborate with engineers to optimize performance, power, and area for AI infrastructure solutions.

Develop board-mounted power solutions for data center technologies, including voltage regulation, power conversion, distribution, DC-DC converters, AC-DC modules, and power management circuits. Model performance using circuit simulation tools, collaborate on PCB layout, minimize EMI and noise, select components with suppliers, and create test procedures validating efficiency, transient response, ripple, noise, and thermal performance.

Designs and delivers high-speed hardware systems and sub-assemblies from concept through production. Responsibilities include hardware specifications, prototype and supplier evaluation, signal and power integrity analysis, schematic and layout reviews, ODM collaboration, hardware bring-up, qualification testing, EMI/EMC and safety validation, and root-cause corrective actions. The role requires system-level development experience in server, computer, or networking products and close collaboration with contract manufacturers.

Design mechanical systems for rack-mounted computing hardware, including chassis, structural frames, board mounts, card cages, power supply mounts, cable management, and thermal integration. Lead DFM and DFA, create manufacturing-ready CAD models and drawings, review ODM designs and tolerance analyses, manage costs, support prototype and validation builds, and contribute through production ramp while tracking program milestones.

Define and implement design-for-test architecture for multi-chip SoCs, including scan, BIST, memory repair, boundary scan, OCC, LBIST, and ATPG. Develop synthesis constraints, supervise ATPG generation, and achieve high scan and at-speed scan coverage. Perform RTL and gate-level simulation using DFT and synthesis tools while collaborating on low-power, high-performance designs for advanced 7nm-or-below technologies.

Develop and integrate OCP SAI with SONiC, enhance control plane stack, ensure optimal SDK performance, and create automated test tools.

Design and develop Linux-based BSP for hardware platforms, focusing on secure boot, hardware initialization, and integration with platform services. Collaborate across teams to optimize performance and support production readiness.

Develop SDK bridging hardware and software for networking. Ensure performance of switch ASICs with a focus on L2/L3 protocols and embedded systems.

Lead the QA strategy for Network SDK, design test frameworks, mentor engineers, validate core SDK layers, and ensure high-quality releases.

Lead the design and development of SDK for Eridu's switch ASICs, ensuring performance and production readiness. Oversee software interfaces for dataplane operations and mentor junior engineers.

Lead the development and integration of OCP SAI with SONiC, requiring expertise in programming, SDK development, and networking protocols.

Develop verification infrastructure, perform ASIC verification, execute simulations, analyze coverage metrics, and ensure quality assurance processes.

The Hardware Engineer will design, validate, and deliver systems and sub-assemblies for AI infrastructure, collaborating across multiple teams to ensure effective product development.