Teams at Eridu AI

The role involves contributing to the development of AI infrastructure solutions that enhance performance in AI data centers, focusing on silicon, software, and system innovations.

The RTL Engineer will collaborate on the design and productization of Ethernet devices, perform RTL coding, debugging, and post-silicon validation with a focus on networking ICs.

Lead DFT architecture for multi-chip systems SOC, managing test design functions and supervising ATPG generation while ensuring performance standards.