Jobs at Credo

Handle employee relations cases from intake through documented closure, including fact-gathering, interviews, objective summaries, escalation of significant risks, and proposed resolutions. Partner with leaders on performance improvement plans, coaching documentation, and respectful performance conversations. Maintain confidential case and PIP records, track deadlines and approvals, prepare biweekly review materials, and improve case-management tools.

Supports the Technology organization by translating business priorities into workforce, talent, leadership, and organizational actions. Coaches leaders, leads workforce planning, talent reviews, performance cycles, succession planning, organizational design, and change initiatives. Uses workforce data to recommend actions, coordinates with People specialists and global partners, and manages confidential plans, milestones, risks, and decision tools through completion.

Partners with Sales, Marketing, Finance, and corporate leaders to develop people plans, coach managers, support workforce and hiring planning, lead talent and performance processes, advise on organization design and change, and translate workforce insights into practical actions. Coordinates with People, Talent Acquisition, Total Rewards, Employee Relations, and Legal teams while managing confidential plans, risks, and execution milestones.

Leads the strategy, roadmap, implementation, governance, and operational management of the organization’s finance technology ecosystem. Owns NetSuite ERP and related finance applications, ensuring secure, scalable, accurate, and compliant systems. Partners with Finance, Supply Chain, Sales, and IT leaders to translate business goals into technology initiatives, drive digital transformation, improve processes, and support executive decision-making. Leads and develops a high-performing finance applications team.

Supports direct and indirect tax activities, including tax compliance, transfer pricing, intercompany settlements, tax provisions, audits, and foreign reporting. Coordinates corporate tax returns with external vendors, manages tax advisors, reviews workpapers, tracks deadlines, and supports technical analyses such as R&D credits and Section 382 studies. Partners with Accounting, FP&A, Legal, Treasury, and global tax teams while improving tax processes through AI and automation.

The Senior Finance Manager leads FP&A for product lines, managing forecasts, budgets, variance analysis, P&L support, product cost and gross margin modeling, ROI analysis, financial reporting, long-range planning, and portfolio optimization. The role partners cross-functionally with product, sales, operations, engineering, and finance teams to improve reporting, capital efficiency, and business performance.

Owns global server infrastructure operations, reliability, security, monitoring, automation, storage, backup, identity, and cloud compute. Provides advanced Tier 2-3 troubleshooting across systems, networks, and security; resolves complex incidents; performs root-cause analysis; leads migrations, upgrades, disaster-recovery testing, and infrastructure projects; automates recurring operations; maintains security baselines and compliance controls; and coordinates with cross-functional technical teams.

Develop Python and C automation scripts and SerDes algorithms for post-silicon verification and validation of high-speed Ethernet products. Evaluate chip performance across environments, operate high-speed test equipment, analyze and debug systems, and generate test reports. Collaborate with design, firmware, and production teams on stable firmware, SLT testing, high-volume sample testing, and customer chip and IP evaluations.

Leads the company-wide Quality Management System across product development, engineering, manufacturing, suppliers, and customer support. Establishes quality policies, audits, controls, inspection plans, and performance metrics while ensuring ISO 9001 compliance. Drives risk assessment, validation, root-cause investigations, CAPA, supplier quality, customer issue resolution, and continuous improvement. Builds and mentors the Quality organization and promotes a company-wide quality culture.

Design and implement synthesizable RTL for high-speed SerDes PHY DSP blocks, including equalization and clock-data recovery functions. Define microarchitecture, translate DSP algorithms into RTL, optimize for power, performance, area, and latency, and verify designs. Support ASIC implementation, timing closure, CDC/RDC, DFT integration, silicon bring-up, PHY integration, and system-level debugging.

Build and ship internal applications and workflow automations from end to end. Map business processes, integrate enterprise systems, model data, develop backend and frontend functionality, and maintain production tools. Apply and evaluate LLM-powered workflows, define automation requirements, and manage build-versus-buy decisions. Partner with sales, operations, finance, product, procurement, IT, and executives while driving user adoption through training, documentation, and support.

Lead and improve the Secure SDLC across software, firmware, cloud, and AI-enabled environments. Conduct application and architecture reviews, threat modeling, source code assessments, vulnerability management, and penetration testing support. Define secure coding standards and security gates, implement DevSecOps controls including SAST, DAST, SCA, secrets scanning, and container security, and automate security testing. Partner with engineering and DevOps teams, mentor developers, and drive security-by-design practices.

The Senior Staff Accountant researches complex U.S. GAAP issues, prepares technical accounting memos, and supports SEC filings including 10-K, 10-Q, and 8-K reports. Responsibilities include coordinating close and reporting processes, preparing disclosures and XBRL tagging, supporting audits and SOX controls, monitoring regulatory developments, advising business units, and improving accounting and reporting processes through automation.

Lead system-level architecture for connecting XPUs to memory and interconnect fabrics across node, rack, and cluster scales. Define topology and communication strategies for distributed LLM training and inference, resolve integration issues across silicon, networking, memory, and software teams, and mentor system-interconnection architects. The role requires substantial NPU architecture, ASIC tapeout, silicon bring-up, validation, and production deployment experience.

Develop and execute verification plans for complex digital designs. Build reusable SystemVerilog-UVM testbenches, sequences, assertions, checkers, and coverage models. Verify PCIe and other interfaces at block and subsystem levels, conduct gate-level and firmware-based simulations, and automate verification flows with scripting. Debug silicon failures, analyze coverage gaps, and collaborate with RTL, firmware, application engineering, and architecture teams to resolve issues and improve specifications.

Leads digital design verification for high-performance networking and interface IP. Architects reusable UVM environments, develops verification plans, testbenches, assertions, coverage models, and constrained-random stimulus. Owns regressions, debugging, coverage closure, and verification sign-off while partnering with design, architecture, firmware, emulation, and post-silicon teams. Develops automation, reviews microarchitecture, mentors engineers, supports product issues, and evaluates AI-enhanced verification methods.

Manages semiconductor production execution across silicon fabs, wafer-level testing facilities, and dicing vendors. Tracks WIP, wafer lots, material movements, cycle times, testing schedules, and vendor progress. Maintains production and inventory data accuracy in ERP systems, coordinates the master production schedule, supports ship-date commitments with sales and planning data, and serves as the operational contact for external manufacturing partners.

Develop and test high-speed SerDes technologies and mixed-signal systems. Responsibilities include creating Python automation, debugging products onsite, developing test plans, characterizing SerDes performance, implementing training algorithms across copper and optical channels, collaborating with design teams, and creating customer-facing technical documentation and reference designs.

Own commercial operations for hyperscaler accounts, including customer portals, forecasts, purchase orders, fulfillment, RMAs, backlog, and invoicing. Coordinate with sales, supply chain, manufacturing, logistics, finance, and customers to resolve issues and align demand with capacity. Manage compliance, pricing, audit documentation, KPI reporting, dashboards, and process automation through EDI or API integrations. Serve as the customer’s internal advocate and support design-win tracking and new product introduction readiness.

Validate, debug, and characterize high-speed optical modules at 212.5 Gbps and beyond. Lead PCB design reviews, signal and power integrity analysis, optical system integration, testing, and production readiness. Collaborate with electrical, optical, mechanical, firmware, packaging, manufacturing, and supplier teams to resolve performance issues and advance optical transceiver products through prototype, NPI, and mass production.