The Role
Leads digital design verification for high-performance networking and interface IP. Architects reusable UVM environments, develops verification plans, testbenches, assertions, coverage models, and constrained-random stimulus. Owns regressions, debugging, coverage closure, and verification sign-off while partnering with design, architecture, firmware, emulation, and post-silicon teams. Develops automation, reviews microarchitecture, mentors engineers, supports product issues, and evaluates AI-enhanced verification methods.
Summary Generated by Built In
Team Credo is seeking a hands-on verification engineer to contribute to digital design verification for our high-performance networking and interface IP portfolio. In this role, you will help architect scalable, reusable verification environments, support UVM testbench development, contribute to verification plans and coverage goals, and partner closely with design and architecture teams to deliver high-quality, production-ready silicon.
Base salary range is $92,000- $154,000 a year. The base salary offer will depend on factors such as education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits.
Why Credo
Qualifications
Responsibilities
Benefits
Credo’s mission is to transform connectivity at scale through fast, reliable, and energy-efficient system solutions. Our high-speed copper and optical interconnect products deliver industry-leading power and performance at up to 1.6T to meet the ever-expanding data infrastructure demands of AI.
Our product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. Credo innovations enable our customers to connect the systems that connect the world.
Credo is committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis. If you have a disability or special need that requires accommodation to navigate our website or complete the application process, email [email protected].
Base salary range is $92,000- $154,000 a year. The base salary offer will depend on factors such as education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits.
Why Credo
- Purpose: We invest in what matters. From meaningful-future shaping projects to competitive compensation, we empower you to grow your career while making a lasting impact.
- People: Connection starts within. We collaborate, celebrate wins, and create an environment where everyone can do their best work.
- Possibilities: Our belief shapes what’s next. Our technology powers the most reliable and energy-efficient connections around the world – and our team powers new products and markets that come next.
Qualifications
- Seven or more years of relevant experience, with a bachelor’s or master’s degree in electrical and/or computer engineering and a strong track record of technical leadership in ASIC/SoC verification methodology and execution.
- Strong understanding of digital design concepts (state machines, data paths, FIFOs, clock-domain crossings, resets, low-power behavior, performance-sensitive architectures), with advanced debugging skills across RTL, testbench, waveforms, assertions, and regression failures.
- Expertise in SystemVerilog, UVM, constrained-random and assertion-based verification, and development of synthesizable and behavioral models with emphasis on configurability and reuse; experience with at least one major tool suite (Cadence, Mentor, or Synopsys) for simulation, lint, and synthesis.
- Strong automation and scripting skills in Python, Perl, Tcl, and shell for regressions, reporting, stimulus, and workflow optimization.
- Knowledge of networking protocols (802.3 Ethernet, PCIe, CXL), on-chip bus and interconnect protocols (AMBA: CHI, AXI, APB), and Forward Error Correction (FEC) algorithms; knowledge of AI workloads is a plus.
Responsibilities
- Define the end-to-end verification strategy and architect reusable, scalable UVM-based testbench frameworks for IP and subsystem-level verification, leading development of reusable components (agents, drivers, monitors, scoreboards, reference models, constrained-random stimulus).
- Translate architecture and functional specifications into verification plans, test scenarios, checkers, assertions, and coverage models, ensuring compliance with relevant standards and internal and external specifications.
- Own regression planning and execution, failure triage, debug, root-cause analysis, and sign-off criteria; drive functional and code coverage closure, identify verification gaps, and improve methodology for quality and efficiency.
- Partner with design, architecture, firmware, emulation, and post-silicon teams, reviewing microarchitecture for testability and observability and influencing design decisions that improve verification effectiveness and debug productivity; support critical product and field issues.
- Develop automation and scripting infrastructure for regressions, reporting, and stimulus generation; lead design and verification reviews, establish best practices, and mentor engineers; evaluate AI-driven verification techniques and streamline existing methodologies around AI-enhanced solutions.
Benefits
Credo’s mission is to transform connectivity at scale through fast, reliable, and energy-efficient system solutions. Our high-speed copper and optical interconnect products deliver industry-leading power and performance at up to 1.6T to meet the ever-expanding data infrastructure demands of AI.
Our product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. Credo innovations enable our customers to connect the systems that connect the world.
Credo is committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis. If you have a disability or special need that requires accommodation to navigate our website or complete the application process, email [email protected].
Skills Required
- Bachelor's or master's degree in electrical engineering and/or computer engineering
- Seven or more years of relevant experience
- Technical leadership in ASIC/SoC verification methodology and execution
- Strong understanding of digital design concepts, including state machines, data paths, FIFOs, clock-domain crossings, resets, low-power behavior, and performance-sensitive architectures
- Expertise in SystemVerilog, UVM, constrained-random verification, and assertion-based verification
- Experience developing synthesizable and behavioral models with emphasis on configurability and reuse
- Strong automation and scripting skills in Python, Perl, Tcl, and shell
- Advanced debugging skills across RTL, testbench, waveforms, assertions, and regression failures
- Experience with networking protocols including 802.3 Ethernet, PCIe, CXL, and related standards
- Experience with on-chip bus and interconnect protocols including AMBA CHI, AXI, and APB
- Knowledge of Forward Error Correction algorithms
- Experience with at least one major tool suite: Cadence, Mentor, or Synopsys tools for simulation, lint, and synthesis
- Knowledge of AI workloads
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The Company
What We Do
Credo is a semiconductor and connectivity technology company developing fast, reliable, energy-efficient solutions for AI-driven applications, cloud computing, and hyperscale networks. Its portfolio is built on SerDes intellectual property, advanced integrated-circuit design, and system-level engineering, supporting data rates up to 1.6T. The company pioneered Active Electrical Cables and provides high-speed interconnect products and IP that reduce bandwidth bottlenecks across modern data-center infrastructure.
