Jobs at Cirrus Logic

Responsible for device characterization and modeling, maintaining lab equipment, and extracting SPICE models for semiconductor devices.

Design and verify high-performance mixed-signal CMOS IC layouts, collaborating with engineers on optimization, layout techniques, and troubleshooting.

Responsible for developing low-power, high-performance ICs in advanced CMOS processes, including design, validation, and post-silicon activities.

Design and develop digital circuit architectures for mixed-signal products, collaborate with engineers, and supervise junior engineers, ensuring high quality IPs.

Responsible for defining and implementing DFT strategies for ASICs, collaborating with teams, and improving DFT productivity through automation.

The Senior Physical Design Engineer will implement RTL to GDS2 physical designs for ASIC projects, collaborate with design teams, and enhance methodologies.

The Embedded Software Test Engineer will design test plans, implement tests for products, automate testing in CI, and communicate results with cross-functional teams.

Design complex software tools and GUIs for internal engineers and external customers. Conduct user research, prototyping, iterative testing, and stakeholder workshops. Translate user needs into actionable designs, collaborate with developers to ensure design intent, and produce design artifacts and prototypes for product integration tooling.

Design and develop black-box and white-box test plans, implement pre- and post-silicon tests, automate tests in CI, triage/debug issues with software teams, and present results to stakeholders.

Lead integration of AI into EDA/CAD workflows: collaborate with internal designers and EDA vendors, apply ML to optimize mixed-signal circuit design and verification, and develop scalable methodologies to boost analog/mixed-signal designer productivity.

The CAD Engineer will develop and maintain software for RTL quality flows, support CAD tools, automate design methodologies, and collaborate on tool improvements.

Design complex, multi-layer HDI PCBs from schematic to manufacturing release. Implement high-speed routing, impedance control, differential pair tuning, and power integrity. Collaborate with cross-functional teams, ensure DFM/DFT compliance, produce fabrication/assembly documentation, and mentor junior designers while improving design workflows and automation.

Design and develop transistor-level analog and mixed-signal circuit blocks, perform circuit simulation and verification, partner with layout/verification/validation teams, support silicon bring-up and debugging, and contribute to design reviews and documentation.

Design and verify digital IC blocks for mixed-signal SOCs on advanced nodes. Develop RTL (Verilog/SystemVerilog), block-level testbenches, collaborate on synthesis/timing/DFT/P&R, contribute to reviews, and mentor junior engineers. Work hybrid from Edinburgh.

Own and develop CAD automation infrastructure and Python-based tools to standardize project setup, automate design flows, manage design data and revisions, integrate/customize EDA tools, build regression/validation frameworks, and collaborate with design, CAD, IT, and vendors to improve design productivity and scale.

Lead and mentor verification engineers in developing verification strategies for mixed-signal ICs, ensuring high standards and execution excellence.

Lead functional verification for mixed-signal ASICs including verification planning, UVM testbench development, constraint-random and directed tests, coverage and failure analysis, digital/mixed-signal modeling, gate simulations, and regression/debug infrastructure.

Support planning and execution of employee events and culture programs, manage corporate swag and vendors, track budgets and purchasing, coordinate event logistics and communications, collect engagement data and post-event feedback, create content for internal and social channels, and improve processes using AI tools.

Develop and verify advanced analog circuit behavioral models and testbenches (SV-RNM, Verilog-AMS) to support analog design, AMS-UVM flows, chip integration, DMS/AMS verification, and automation tools. Collaborate with system architects, designers, and verification teams to streamline architectural exploration and regression debug; execute test plans and support pre- and post-silicon validation.

Lead and grow a Taipei-based embedded system test team. Define and execute post-silicon system test strategies, drive test automation and CI, partner with firmware/driver/product teams for validation and defect triage, and represent system test status to internal and external stakeholders.