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The Design Verification Engineer will plan, architect, and develop verification environments for FPGAs in electronic warfare systems. Responsibilities include creating self-checking testbenches, developing test plans, leading DV teams, mentoring junior engineers, and enhancing verification processes.
The Senior FPGA Digital Design Engineer will support FPGA designs through all development phases, including design architecture, RTL coding, synthesis, timing closure, and product support. The engineer is expected to mentor less experienced staff and work collaboratively in a team environment, focusing on debugging and problem-solving.
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