Top Engineering Jobs

Lead DFT strategy for ultra-low-power SoCs: design and implement scan, boundary scan, MBIST, ATPG and low-power DFT architectures; generate and analyze structural test vectors; run pre/post-layout simulations; collaborate with design, verification, and test teams to optimize coverage, test time, cost, and bring-up test vectors on silicon.

Leads automated test equipment solution development for integrated circuits through characterization, qualification, production ramp, and high-volume manufacturing. Develops ATE programs, hardware, scripts, and data-analysis tools; improves yield, test time, cost, quality, and reliability. Supports product transfers, production qualification, site ramps, debugging, returns analysis, and cross-functional collaboration with engineering, operations, and OSAT partners.

Lead post-silicon validation strategy for ultra-low-power MCUs/SoCs: develop automation and firmware, run characterization/PVT/shmoo tests, perform complex debug and root-cause analysis, improve lab infrastructure and production test correlation, and mentor validation engineers across cross-functional teams.

Architect and implement SoC/MCU RTL (Verilog/SystemVerilog), own complex blocks from spec through tapeout, integrate IP and ARM subsystems, collaborate with verification and physical design, resolve LINT/CDC/RDC issues, support FPGA prototyping and silicon bring-up, and mentor junior engineers.

Lead post-silicon validation and optimization of BLE and other wireless radio subsystems. Define validation methodologies, build automation and firmware for RF/PHY characterization, design RF lab hardware/infrastructure, execute RF performance and power tests, debug system-level issues, and mentor engineers to improve wireless performance and production correlation.

Lead post-silicon power validation, characterization, and optimization for ultra-low-power mixed-signal SoCs. Develop validation methodologies, automation frameworks, firmware, and hardware for precision power measurement. Analyze power across modes and workloads, collaborate with cross-functional teams to resolve silicon issues, and mentor engineers while delivering scalable validation infrastructure and lab automation.

Lead development and optimization of ATE test programs and hardware for IC characterization, qualification, and high-volume manufacturing. Drive yield improvement, test cost reduction, root-cause analysis, production support, and cross-functional coordination with OSATs and engineering teams.

Lead architecture, development, integration, and validation of imaging subsystem firmware and drivers for ARM Cortex-M SoCs. Port, optimize, and debug camera interfaces (MIPI CSI-2), video codecs, and image pipelines across pre-silicon FPGA and post-silicon platforms. Enable sensor bring-up, calibration, and performance tuning; support verification, field engineers, and customers; and optimize for real-time, memory, and power-constrained embedded systems.

Lead development and bring-up of DSP software environment: design/port HAL for DSP peripherals, evaluate/port RTOS/schedulers, implement boot and IPC/RPC protocols, create tests/examples, support pre- and post-silicon verification, performance optimization, and customer support for DSP workloads.

The Principal Edge AI Firmware Engineer will develop and optimize embedded software for AI applications, focusing on performance and energy efficiency. Responsibilities include enhancing AI runtimes, profiling tools, and ensuring customer integration across embedded environments.