Top Engineering Jobs

Engineering intern supporting DRAM semiconductor test-structure development, layout, physical verification, simulation, electrical characterization, and data analysis. The role uses EDA tools and scripting languages to build and validate test structures, analyze silicon results, automate engineering workflows, and document technical findings. Collaboration with process integration, device engineering, characterization, and technology development teams is required.

Creates and verifies analog, digital, array, core, pitch, and periphery layouts for memory products. Responsibilities include floor planning, placement, routing, matching, parasitic mitigation, LVS/DRC debugging, ECO/LCO/DFM tasks, and delivering mid-size blocks. Coordinates with design, technology development, CAD, and layout teams to meet quality and schedule requirements while applying automation and AI tools.

Leads silicon design validation for NAND Flash products, including development, simulation, bench testing, characterization, qualification, and silicon debugging. Heads technical task forces, drives issue resolution, performs wafer and tester measurements, and collaborates with R&D, design, manufacturing, business, and quality teams. The role requires strong analog and mixed-signal VLSI expertise, memory architecture knowledge, data analysis, and programming or scripting capabilities.

Develop, validate, characterize, debug, and qualify advanced NAND Flash memory products. Analyze large datasets, improve design margins, perform electrical failure analysis, and create tester or coding macros. Collaborate globally with design, manufacturing, fabrication, testing, quality, and business teams to identify root causes, validate specifications, collect volume data, and deliver robust solutions for high-speed ONFI performance.

Paid? This 18-week Micron semester internship gives students hands-on semiconductor industry experience through department projects, mentorship, training, networking, and a final presentation. Interns work Monday through Friday at locations in Taoyuan, Tongluo, Taichung, or Tainan. Eligible applicants include senior undergraduates, first- or second-year master’s students, and Ph.D. students graduating within one year. Outstanding interns may receive consideration for future full-time employment.

Supports a semiconductor test engineering project focused on improving burn-in equipment availability and Parts per Jam. Responsibilities include structuring alarm data, analyzing downtime patterns, developing predictive analytics, creating automated notifications and visualizations, validating trigger logic, and evaluating socket-masking and Agentic AI solutions. The intern will use Python, SQL, Power BI, and Power Automate while learning semiconductor test processes and equipment monitoring.

Analyze inline, parametric, probe, and experimental data to identify wafer-yield limiters and resolve process or tool issues. The engineer applies semiconductor device physics, electronics, manufacturing-process knowledge, and statistical analysis to improve yield, quality, and technology ramp. Responsibilities include communicating yield findings, creating Pareto analyses, collaborating across Fab and Yield Enhancement groups, supporting cross-functional problem-solving teams, transferring new technologies into production, and responsibly integrating AI-assisted tools.

Develop and support automation, AI, data integration, reporting, and analytics solutions for Facilities. Evaluate AI use cases, integrate capabilities with enterprise systems such as SAP and ECBP, optimize workflows, and improve operational decision-making. Lead projects from requirements through implementation, adoption, and change management while ensuring reliability, scalability, compliance, and business value. Collaborate across engineering, construction, operations, sustainability, EHS, and project teams, and coach others on automation and AI tools.

Intern will optimize semiconductor manufacturing layout planning for an MSH probe ramp. Responsibilities include conducting site assessments, evaluating installation readiness, mapping workflows, identifying bottlenecks, and developing AI-enabled automation using tools such as Power Automate, Python, SQL, and Microsoft Copilot. The intern will collaborate with engineering and production stakeholders, apply responsible AI practices, measure project benefits, and document solutions and user guidance.

Supports legacy DRAM products through electrical and physical failure analysis, yield improvement, reliability enhancement, and root-cause investigations. Uses statistical analysis, data visualization, and AI-supported workflows to identify fabrication, assembly, and testing issues. Collaborates with Product, Process, Quality, and Test Engineering teams to resolve defects and improve component performance. Communicates technical findings through reports and presentations.