Top Engineering Jobs

Develops and executes enterprise SSD firmware validation across development, qualification, and sustaining phases. Designs tests for firmware features, NVMe protocols, security capabilities, and system behaviors; analyzes regressions, customer issues, and field-return failures to identify root causes. Builds Python automation, regression frameworks, and coverage reporting while collaborating with firmware engineers, data scientists, and global teams on debugging, design reviews, and AI-enabled testing improvements.

Designs and oversees electrical systems for semiconductor manufacturing facilities. Responsibilities include field inspections, evaluating system safety and reliability, leading electrical design and construction drawing development, ensuring constructability in operating manufacturing environments, and coordinating with facilities and manufacturing stakeholders. The role also manages projects while balancing safety, quality, schedule, and budget requirements.

Leads Micron’s advanced NAND process integration organization and next-generation technology roadmap. Responsibilities include technology pathfinding, architecture development, process integration from concept through delivery, CSPEC/FMEA development, test vehicle execution, manufacturable solution development, and cross-functional milestone delivery. The role partners globally with device, design, probe, test, reliability, yield, operations, and process teams while building and mentoring a high-performing engineering organization and adopting AI-enabled, data-driven methodologies.

Develop and execute reliability stress tests, qualification plans, and test flows for HBM products. Drive DPM reduction, perform root-cause analysis using EFA/PFA, recommend process conversions for HVM, manage qualification risks, collaborate cross-functionally, make technical prioritization decisions, and embed AI/ML tools (Python, JMP, Claude) into reliability workflows to improve analytics and automation.

Designs, simulates, and optimizes digital, analog, and DRAM memory circuits for advanced HBM products. Responsibilities include CMOS circuit design, floorplanning, layout leadership, power and timing optimization, simulation using FINESIM, HSPICE, and Verilog, tape-out validation, silicon correlation, documentation, and cross-functional technical leadership across global engineering and manufacturing teams.

Develop AI-driven automation and CAD methodologies for memory silicon design, including layout generation, floorplanning, AMS, PDN, analysis, optimization, and design-space exploration. Build production-quality software frameworks integrating EDA tools and workflows, improve design quality and productivity, and collaborate with design, layout, CAD, verification, and product teams to accelerate design convergence and time-to-tapeout.

Responsible for starting up, developing and optimizing assembly/process equipment to improve yield, quality, cost and productivity. Diagnose and resolve manufacturing issues using FMEA, SPC, DOE and failure analysis. Lead yield improvement, supplier/material management, process qualifications and integrate AI/data-driven methods for predictive control, anomaly detection and analytics-driven decision support.

Optimizes semiconductor manufacturing processes to improve yield, quality, throughput, equipment effectiveness, and wafer output. Analyzes process performance using SPC, FDC, DOE, and engineering tools; resolves process, tool, defect, and yield issues; maintains procedures and training documentation; and uses analytics, visualization, and AI-enabled tools to drive continuous improvement. Collaborates with equipment engineers, operations teams, process owners, and cross-functional stakeholders while working assigned rotating shifts.

Leads pre-silicon design readiness for new DRAM products through risk assessment, DFMEA, validation planning, readiness reviews, silicon debug, root-cause analysis, and mitigation strategy development. Partners with design, validation, product engineering, test, manufacturing, and architecture teams to improve coverage, quality, and production readiness. Provides technical leadership, mentors engineers, develops scalable processes, and promotes responsible AI-enabled engineering workflows.

Supports semiconductor technology development during 12-hour shifts by resolving process and equipment issues, protecting yield, managing excursions and line-downs, executing reaction plans, and coordinating with development, operations, technicians, and suppliers. Performs data-driven troubleshooting, SPC and quality control, root-cause analysis, process development support, critical-lot monitoring, wafer shipments, and project execution to improve process stability, tool performance, output, and manufacturing efficiency.