Top Engineering Jobs

Develops and integrates semiconductor manufacturing processes for BEOL technology. Leads root-cause analysis and yield improvement for defects, yield loss, and variation across processes such as CMP, etch, and lithography. Integrates electrical, inline, and defect data using SPC, FMEA, failure analysis, and data analysis techniques. Collaborates with process, equipment, manufacturing, and quality teams while managing multiple projects and driving solutions independently.

Conduct a five-month engineering project optimizing Chemical Mechanical Planarization processes and characterizing equipment in semiconductor manufacturing. Analyze process, metrology, equipment, and manufacturing data using statistical and AI-assisted methods; assess process capability and qualification results; and develop a dashboard, analytics model, or automation tool. Collaborate with cross-functional stakeholders and deliver technical reports, presentations, engineering recommendations, and documented improvement results focused on stability, yield, cost, productivity, or data accessibility.

Develop and debug early-boot BIOS firmware to enable, validate, and qualify Micron DRAM on next-generation platforms. Integrate and troubleshoot Memory Reference Code (MRC), analyze firmware behavior against electrical DRAM outcomes, support memory bring-up, training, margining, and failure analysis, collaborate with internal teams and external platform partners, maintain BIOS images for labs and customers, and mentor other engineers.

Develop, maintain, troubleshoot, and support semiconductor manufacturing execution systems. Partner with customers and global teams on requirements, incident management, software releases, system reliability, monitoring, and technical support. Provide application training, analyze service health, apply AI-enabled tools to improve operations, participate in 24x7 on-call coverage, and work flexible shifts with domestic travel.

Develop, debug, and maintain test programs for advanced semiconductor memory devices (Probe, Burn-in, Final Test, Module Test). Support 1st-silicon/NPI through High-Volume Manufacturing, use available tools including AI-enabled tools to improve productivity, produce technical documentation, organize issues, and streamline workflows.

Support DRAM design verification by developing test cases, test benches, test vectors, and verification environments. Simulate, analyze, and debug pre-silicon block-level and full-chip designs; run regressions and improve functional coverage. Use AI-based tools, agentic workflows, and automation to accelerate verification and debugging. Collaborate internationally on verification methodologies for DRAM and emerging memory products.

Lead global contamination-control strategy across semiconductor wafer fabs, improving yield, reliability, throughput, and cost. Responsibilities include contamination-risk mitigation, process and equipment optimization, capacity expansion support, wafer-shipment controls, KPI development, supplier collaboration, SOP standardization, and cross-functional project leadership. The role requires driving data-based monitoring, resolving process issues, supporting qualifications, coordinating global teams, and communicating outcomes across manufacturing sites.

Drive next-generation memory package architecture and pathfinding across silicon, packaging, boards, and systems. Define packaging strategies optimized for bandwidth, power, thermal, mechanical, electrical, and system performance. Lead cross-functional collaboration with design teams, customers, business units, and senior leaders. Develop AI-based EDA and automation tools, measurement automation, and long-term technology roadmaps. Apply expertise in memory systems, package design, signaling, power integrity, timing, and simulation.

Own verification and end-to-end analysis of full-chip gate-level DRAM designs. Develop SystemVerilog/UVM testbenches, test cases, stimuli, test vectors, regressions, and coverage improvements. Simulate and debug block-level and full-chip designs, support AMS co-simulation, develop verification methodologies, and improve workflows using AI tools and automation. Guide new team members and collaborate with global design and verification teams across advanced memory products.

Leads validation strategy and automated testing for NAND-based SSD firmware across functional, performance, reliability, interoperability, and customer qualification domains. Develops test plans and automation frameworks, debugs NVMe and SAS issues, analyzes quality risks, and drives issue closure with cross-functional engineering teams and hyperscale customers. Applies AI and machine learning to test generation, failure analysis, anomaly detection, reporting, and predictive quality. Mentors engineers and leads complex validation programs.